Differential D18893 Diff 54077 head/sys/x86/include/specialreg.h

Changeset View

Standalone View

head/sys/x86/include/specialreg.h

	Show First 20 Lines • Show All 71 Lines • ▼ Show 20 Lines
	#define CR4_FXSR 0x00000200 /* Fast FPU save/restore used by OS */			#define CR4_FXSR 0x00000200 /* Fast FPU save/restore used by OS */
	#define CR4_XMM 0x00000400 /* enable SIMD/MMX2 to use except 16 */			#define CR4_XMM 0x00000400 /* enable SIMD/MMX2 to use except 16 */
	#define CR4_VMXE 0x00002000 /* enable VMX operation (Intel-specific) */			#define CR4_VMXE 0x00002000 /* enable VMX operation (Intel-specific) */
	#define CR4_FSGSBASE 0x00010000 /* Enable FS/GS BASE accessing instructions */			#define CR4_FSGSBASE 0x00010000 /* Enable FS/GS BASE accessing instructions */
	#define CR4_PCIDE 0x00020000 /* Enable Context ID */			#define CR4_PCIDE 0x00020000 /* Enable Context ID */
	#define CR4_XSAVE 0x00040000 /* XSETBV/XGETBV */			#define CR4_XSAVE 0x00040000 /* XSETBV/XGETBV */
	#define CR4_SMEP 0x00100000 /* Supervisor-Mode Execution Prevention */			#define CR4_SMEP 0x00100000 /* Supervisor-Mode Execution Prevention */
	#define CR4_SMAP 0x00200000 /* Supervisor-Mode Access Prevention */			#define CR4_SMAP 0x00200000 /* Supervisor-Mode Access Prevention */
				#define CR4_PKE 0x00400000 /* Protection Keys Enable */

	/*			/*
	* Bits in AMD64 special registers. EFER is 64 bits wide.			* Bits in AMD64 special registers. EFER is 64 bits wide.
	*/			*/
	#define EFER_SCE 0x000000001 /* System Call Extensions (R/W) */			#define EFER_SCE 0x000000001 /* System Call Extensions (R/W) */
	#define EFER_LME 0x000000100 /* Long mode enable (R/W) */			#define EFER_LME 0x000000100 /* Long mode enable (R/W) */
	#define EFER_LMA 0x000000400 /* Long mode active (R) */			#define EFER_LMA 0x000000400 /* Long mode active (R) */
	#define EFER_NXE 0x000000800 /* PTE No-Execute bit enable (R/W) */			#define EFER_NXE 0x000000800 /* PTE No-Execute bit enable (R/W) */
	▲ Show 20 Lines • Show All 1,027 Lines • Show Last 20 Lines