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Show First 20 Lines • Show All 327 Lines • ▼ Show 20 Lines	ixl_iw_pf_msix_init(void *pf_handle,
struct i40e_hw *hw = &pf->hw;		struct i40e_hw *hw = &pf->hw;
u32 reg;		u32 reg;
int vec, i;		int vec, i;

INIT_DEBUGOUT("begin");		INIT_DEBUGOUT("begin");

if ((msix_info->aeq_vector < IXL_IW_VEC_BASE(pf)) \|\|		if ((msix_info->aeq_vector < IXL_IW_VEC_BASE(pf)) \|\|
(msix_info->aeq_vector >= IXL_IW_VEC_LIMIT(pf))) {		(msix_info->aeq_vector >= IXL_IW_VEC_LIMIT(pf))) {
printf("%s: invalid MSIX vector (%i) for AEQ\n",		printf("%s: invalid MSI-X vector (%i) for AEQ\n",
__func__, msix_info->aeq_vector);		__func__, msix_info->aeq_vector);
return (EINVAL);		return (EINVAL);
}		}
reg = I40E_PFINT_AEQCTL_CAUSE_ENA_MASK \|		reg = I40E_PFINT_AEQCTL_CAUSE_ENA_MASK \|
(msix_info->aeq_vector << I40E_PFINT_AEQCTL_MSIX_INDX_SHIFT) \|		(msix_info->aeq_vector << I40E_PFINT_AEQCTL_MSIX_INDX_SHIFT) \|
(msix_info->itr_indx << I40E_PFINT_AEQCTL_ITR_INDX_SHIFT);		(msix_info->itr_indx << I40E_PFINT_AEQCTL_ITR_INDX_SHIFT);
wr32(hw, I40E_PFINT_AEQCTL, reg);		wr32(hw, I40E_PFINT_AEQCTL, reg);

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