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Differential D18755 Diff 52899 sys/amd64/vmm/vmm_lapic.c

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sys/amd64/vmm/vmm_lapic.c

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#define MSI_X86_ADDR_RH 0x00000008 /* Redirection Hint */ #define MSI_X86_ADDR_RH 0x00000008 /* Redirection Hint */
#define MSI_X86_ADDR_LOG 0x00000004 /* Destination Mode */ #define MSI_X86_ADDR_LOG 0x00000004 /* Destination Mode */
int int
lapic_set_intr(struct vm *vm, int cpu, int vector, bool level) lapic_set_intr(struct vm *vm, int cpu, int vector, bool level)
{ {
struct vlapic *vlapic; struct vlapic *vlapic;
if (cpu < 0 || cpu >= VM_MAXCPU) if (cpu < 0 || cpu >= vm_get_maxcpus(vm))
return (EINVAL); return (EINVAL);
/* /*
* According to section "Maskable Hardware Interrupts" in Intel SDM * According to section "Maskable Hardware Interrupts" in Intel SDM
* vectors 16 through 255 can be delivered through the local APIC. * vectors 16 through 255 can be delivered through the local APIC.
*/ */
if (vector < 16 || vector > 255) if (vector < 16 || vector > 255)
return (EINVAL); return (EINVAL);
vlapic = vm_lapic(vm, cpu); vlapic = vm_lapic(vm, cpu);
if (vlapic_set_intr_ready(vlapic, vector, level)) if (vlapic_set_intr_ready(vlapic, vector, level))
vcpu_notify_event(vm, cpu, true); vcpu_notify_event(vm, cpu, true);
return (0); return (0);
} }
int int
lapic_set_local_intr(struct vm *vm, int cpu, int vector) lapic_set_local_intr(struct vm *vm, int cpu, int vector)
{ {
struct vlapic *vlapic; struct vlapic *vlapic;
cpuset_t dmask; cpuset_t dmask;
int error; int error;
if (cpu < -1 || cpu >= VM_MAXCPU) if (cpu < -1 || cpu >= vm_get_maxcpus(vm))
return (EINVAL); return (EINVAL);
if (cpu == -1) if (cpu == -1)
dmask = vm_active_cpus(vm); dmask = vm_active_cpus(vm);
else else
CPU_SETOF(cpu, &dmask); CPU_SETOF(cpu, &dmask);
error = 0; error = 0;
while ((cpu = CPU_FFS(&dmask)) != 0) { while ((cpu = CPU_FFS(&dmask)) != 0) {
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