Page MenuHomeFreeBSD
Differential D18462 Diff 51721 head/sys/riscv/riscv/swtch.S

Changeset View

Standalone View

View Options

head/sys/riscv/riscv/swtch.S

Show First 20 Lines • Show All 217 Lines • ▼ Show 20 LinesENTRY(cpu_throw)
sfence.vma sfence.vma
/* Switch to the new pmap */ /* Switch to the new pmap */
ld t0, PCB_L1ADDR(x13) ld t0, PCB_L1ADDR(x13)
srli t0, t0, PAGE_SHIFT srli t0, t0, PAGE_SHIFT
li t1, SATP_MODE_SV39 li t1, SATP_MODE_SV39
or t0, t0, t1 or t0, t0, t1
csrw sptbr, t0 csrw satp, t0
/* TODO: Invalidate the TLB */ /* TODO: Invalidate the TLB */
sfence.vma sfence.vma
/* Load registers */ /* Load registers */
ld ra, (PCB_RA)(x13) ld ra, (PCB_RA)(x13)
ld sp, (PCB_SP)(x13) ld sp, (PCB_SP)(x13)
▲ Show 20 Lines • Show All 101 Lines • ▼ Show 20 Lines#endif
sfence.vma sfence.vma
/* Switch to the new pmap */ /* Switch to the new pmap */
ld t0, PCB_L1ADDR(x13) ld t0, PCB_L1ADDR(x13)
srli t0, t0, PAGE_SHIFT srli t0, t0, PAGE_SHIFT
li t1, SATP_MODE_SV39 li t1, SATP_MODE_SV39
or t0, t0, t1 or t0, t0, t1
csrw sptbr, t0 csrw satp, t0
/* TODO: Invalidate the TLB */ /* TODO: Invalidate the TLB */
sfence.vma sfence.vma
/* Release the old thread */ /* Release the old thread */
sd a2, TD_LOCK(a0) sd a2, TD_LOCK(a0)
#if defined(SCHED_ULE) && defined(SMP) #if defined(SCHED_ULE) && defined(SMP)
▲ Show 20 Lines • Show All 142 Lines • Show Last 20 Lines