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head/sys/powerpc/powerpc/exec_machdep.c
Show First 20 Lines • Show All 118 Lines • ▼ Show 20 Lines | struct sigframe32 { | ||||
struct siginfo32 sf_si; | struct siginfo32 sf_si; | ||||
}; | }; | ||||
static int grab_mcontext32(struct thread *td, mcontext32_t *, int flags); | static int grab_mcontext32(struct thread *td, mcontext32_t *, int flags); | ||||
#endif | #endif | ||||
static int grab_mcontext(struct thread *, mcontext_t *, int); | static int grab_mcontext(struct thread *, mcontext_t *, int); | ||||
#ifdef __powerpc64__ | |||||
extern struct sysentvec elf64_freebsd_sysvec_v2; | |||||
#endif | |||||
void | void | ||||
sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) | sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) | ||||
{ | { | ||||
struct trapframe *tf; | struct trapframe *tf; | ||||
struct sigacts *psp; | struct sigacts *psp; | ||||
struct sigframe sf; | struct sigframe sf; | ||||
struct thread *td; | struct thread *td; | ||||
struct proc *p; | struct proc *p; | ||||
▲ Show 20 Lines • Show All 874 Lines • ▼ Show 20 Lines | if (SV_PROC_FLAG(td->td_proc, SV_ILP32)) { | ||||
tf->srr0 = (register_t)entry; | tf->srr0 = (register_t)entry; | ||||
#ifdef __powerpc64__ | #ifdef __powerpc64__ | ||||
tf->srr1 = psl_userset32 | PSL_FE_DFLT; | tf->srr1 = psl_userset32 | PSL_FE_DFLT; | ||||
#else | #else | ||||
tf->srr1 = psl_userset | PSL_FE_DFLT; | tf->srr1 = psl_userset | PSL_FE_DFLT; | ||||
#endif | #endif | ||||
} else { | } else { | ||||
#ifdef __powerpc64__ | #ifdef __powerpc64__ | ||||
if (td->td_proc->p_sysent == &elf64_freebsd_sysvec_v2) { | |||||
tf->srr0 = (register_t)entry; | |||||
/* ELFv2 ABI requires that the global entry point be in r12. */ | |||||
tf->fixreg[12] = (register_t)entry; | |||||
} | |||||
else { | |||||
register_t entry_desc[3]; | register_t entry_desc[3]; | ||||
(void)copyin((void *)entry, entry_desc, sizeof(entry_desc)); | (void)copyin((void *)entry, entry_desc, sizeof(entry_desc)); | ||||
tf->srr0 = entry_desc[0]; | tf->srr0 = entry_desc[0]; | ||||
tf->fixreg[2] = entry_desc[1]; | tf->fixreg[2] = entry_desc[1]; | ||||
tf->fixreg[11] = entry_desc[2]; | tf->fixreg[11] = entry_desc[2]; | ||||
} | |||||
tf->srr1 = psl_userset | PSL_FE_DFLT; | tf->srr1 = psl_userset | PSL_FE_DFLT; | ||||
#endif | #endif | ||||
} | } | ||||
td->td_pcb->pcb_flags = 0; | td->td_pcb->pcb_flags = 0; | ||||
#ifdef __SPE__ | #ifdef __SPE__ | ||||
td->td_pcb->pcb_vec.vscr = SPEFSCR_FINVE | SPEFSCR_FDBZE | | td->td_pcb->pcb_vec.vscr = SPEFSCR_FINVE | SPEFSCR_FDBZE | | ||||
SPEFSCR_FUNFE | SPEFSCR_FOVFE; | SPEFSCR_FUNFE | SPEFSCR_FOVFE; | ||||
▲ Show 20 Lines • Show All 88 Lines • Show Last 20 Lines |