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Differential D17713 Diff 49787 head/sys/amd64/vmm/amd/svm_msr.c

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head/sys/amd64/vmm/amd/svm_msr.c

Show First 20 Lines • Show All 121 Lines • ▼ Show 20 Linessvm_rdmsr(struct svm_softc *sc, int vcpu, u_int num, uint64_t *result,
case MSR_MTRR16kBase ... MSR_MTRR16kBase + 1: case MSR_MTRR16kBase ... MSR_MTRR16kBase + 1:
case MSR_MTRR64kBase: case MSR_MTRR64kBase:
case MSR_SYSCFG: case MSR_SYSCFG:
*result = 0; *result = 0;
break; break;
case MSR_AMDK8_IPM: case MSR_AMDK8_IPM:
*result = 0; *result = 0;
break; break;
case MSR_EXTFEATURES:
anishUnsubmitted
Not Done
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This cases could have been merged with upper block, something like

 case MSR_MTRR64kBase:
 case MSR_SYSCFG:
 case MSR_AMDK8_IPM:
case MSR_EXTFEATURES:
         *result = 0;
         break;
anish: This cases could have been merged with upper block, something like case…
araujoAuthorUnsubmitted
Done
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Thanks @anish , I made the changes at: https://svnweb.freebsd.org/changeset/base/339936

araujo: Thanks @anish , I made the changes at: https://svnweb.freebsd.org/changeset/base/339936
*result = 0;
break;
default: default:
error = EINVAL; error = EINVAL;
break; break;
} }
return (error); return (error);
} }
Show All 19 Lines case MSR_AMDK8_IPM:
/* /*
* Ignore writes to the "Interrupt Pending Message" MSR. * Ignore writes to the "Interrupt Pending Message" MSR.
*/ */
break; break;
case MSR_K8_UCODE_UPDATE: case MSR_K8_UCODE_UPDATE:
/* /*
* Ignore writes to microcode update register. * Ignore writes to microcode update register.
*/ */
break;
case MSR_EXTFEATURES:
break; break;
default: default:
error = EINVAL; error = EINVAL;
break; break;
} }
return (error); return (error);
} }