Differential D16404 Diff 47077 head/sys/dev/nvme/nvme.h

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head/sys/dev/nvme/nvme.h

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#define NVME_AQA_REG_ASQS_SHIFT (0)		#define NVME_AQA_REG_ASQS_SHIFT (0)
#define NVME_AQA_REG_ASQS_MASK (0xFFF)		#define NVME_AQA_REG_ASQS_MASK (0xFFF)
#define NVME_AQA_REG_ACQS_SHIFT (16)		#define NVME_AQA_REG_ACQS_SHIFT (16)
#define NVME_AQA_REG_ACQS_MASK (0xFFF)		#define NVME_AQA_REG_ACQS_MASK (0xFFF)

/* Command field definitions */		/* Command field definitions */

#define NVME_CMD_OPC_SHIFT (0)
#define NVME_CMD_OPC_MASK (0xFF)
#define NVME_CMD_FUSE_SHIFT (8)		#define NVME_CMD_FUSE_SHIFT (8)
#define NVME_CMD_FUSE_MASK (0x3)		#define NVME_CMD_FUSE_MASK (0x3)

#define NVME_CMD_SET_OPC(opc) (htole16(((uint16_t)(opc) & NVME_CMD_OPC_MASK) << NVME_CMD_OPC_SHIFT))

#define NVME_STATUS_P_SHIFT (0)		#define NVME_STATUS_P_SHIFT (0)
#define NVME_STATUS_P_MASK (0x1)		#define NVME_STATUS_P_MASK (0x1)
#define NVME_STATUS_SC_SHIFT (1)		#define NVME_STATUS_SC_SHIFT (1)
#define NVME_STATUS_SC_MASK (0xFF)		#define NVME_STATUS_SC_MASK (0xFF)
#define NVME_STATUS_SCT_SHIFT (9)		#define NVME_STATUS_SCT_SHIFT (9)
#define NVME_STATUS_SCT_MASK (0x7)		#define NVME_STATUS_SCT_MASK (0x7)
#define NVME_STATUS_M_SHIFT (14)		#define NVME_STATUS_M_SHIFT (14)
#define NVME_STATUS_M_MASK (0x1)		#define NVME_STATUS_M_MASK (0x1)
▲ Show 20 Lines • Show All 295 Lines • ▼ Show 20 Lines	struct nvme_registers
} doorbell[1] __packed;		} doorbell[1] __packed;
} __packed;		} __packed;

_Static_assert(sizeof(struct nvme_registers) == 0x1008, "bad size for nvme_registers");		_Static_assert(sizeof(struct nvme_registers) == 0x1008, "bad size for nvme_registers");

struct nvme_command		struct nvme_command
{		{
/* dword 0 */		/* dword 0 */
uint16_t opc_fuse; /* opcode, fused operation */		uint8_t opc; /* opcode */
		uint8_t fuse; /* fused operation */
uint16_t cid; /* command identifier */		uint16_t cid; /* command identifier */

/* dword 1 */		/* dword 1 */
uint32_t nsid; /* namespace identifier */		uint32_t nsid; /* namespace identifier */

/* dword 2-3 */		/* dword 2-3 */
uint32_t rsvd2;		uint32_t rsvd2;
uint32_t rsvd3;		uint32_t rsvd3;
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* These functions assume allocator zeros out cmd structure		* These functions assume allocator zeros out cmd structure
* CAM's xpt_get_ccb and the request allocator for nvme both		* CAM's xpt_get_ccb and the request allocator for nvme both
* do zero'd allocations.		* do zero'd allocations.
*/		*/
static inline		static inline
void nvme_ns_flush_cmd(struct nvme_command *cmd, uint32_t nsid)		void nvme_ns_flush_cmd(struct nvme_command *cmd, uint32_t nsid)
{		{

cmd->opc_fuse = NVME_CMD_SET_OPC(NVME_OPC_FLUSH);		cmd->opc = NVME_OPC_FLUSH;
cmd->nsid = htole32(nsid);		cmd->nsid = htole32(nsid);
}		}

static inline		static inline
void nvme_ns_rw_cmd(struct nvme_command *cmd, uint32_t rwcmd, uint32_t nsid,		void nvme_ns_rw_cmd(struct nvme_command *cmd, uint32_t rwcmd, uint32_t nsid,
uint64_t lba, uint32_t count)		uint64_t lba, uint32_t count)
{		{
cmd->opc_fuse = NVME_CMD_SET_OPC(rwcmd);		cmd->opc = rwcmd;
cmd->nsid = htole32(nsid);		cmd->nsid = htole32(nsid);
cmd->cdw10 = htole32(lba & 0xffffffffu);		cmd->cdw10 = htole32(lba & 0xffffffffu);
cmd->cdw11 = htole32(lba >> 32);		cmd->cdw11 = htole32(lba >> 32);
cmd->cdw12 = htole32(count-1);		cmd->cdw12 = htole32(count-1);
}		}

static inline		static inline
void nvme_ns_write_cmd(struct nvme_command *cmd, uint32_t nsid,		void nvme_ns_write_cmd(struct nvme_command *cmd, uint32_t nsid,
uint64_t lba, uint32_t count)		uint64_t lba, uint32_t count)
{		{
nvme_ns_rw_cmd(cmd, NVME_OPC_WRITE, nsid, lba, count);		nvme_ns_rw_cmd(cmd, NVME_OPC_WRITE, nsid, lba, count);
}		}

static inline		static inline
void nvme_ns_read_cmd(struct nvme_command *cmd, uint32_t nsid,		void nvme_ns_read_cmd(struct nvme_command *cmd, uint32_t nsid,
uint64_t lba, uint32_t count)		uint64_t lba, uint32_t count)
{		{
nvme_ns_rw_cmd(cmd, NVME_OPC_READ, nsid, lba, count);		nvme_ns_rw_cmd(cmd, NVME_OPC_READ, nsid, lba, count);
}		}

static inline		static inline
void nvme_ns_trim_cmd(struct nvme_command *cmd, uint32_t nsid,		void nvme_ns_trim_cmd(struct nvme_command *cmd, uint32_t nsid,
uint32_t num_ranges)		uint32_t num_ranges)
{		{
cmd->opc_fuse = NVME_CMD_SET_OPC(NVME_OPC_DATASET_MANAGEMENT);		cmd->opc = NVME_OPC_DATASET_MANAGEMENT;
cmd->nsid = htole32(nsid);		cmd->nsid = htole32(nsid);
cmd->cdw10 = htole32(num_ranges - 1);		cmd->cdw10 = htole32(num_ranges - 1);
cmd->cdw11 = htole32(NVME_DSM_ATTR_DEALLOCATE);		cmd->cdw11 = htole32(NVME_DSM_ATTR_DEALLOCATE);
}		}

extern int nvme_use_nvd;		extern int nvme_use_nvd;

#endif /* _KERNEL */		#endif /* _KERNEL */
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