Differential D16540 Diff 46127 sys/dev/ntb/ntb_hw/ntb_hw_plx.c

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sys/dev/ntb/ntb_hw/ntb_hw_plx.c

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#include "../ntb.h"		#include "../ntb.h"

#define PLX_MAX_BARS 4 /* There are at most 4 data BARs. */		#define PLX_MAX_BARS 4 /* There are at most 4 data BARs. */
#define PLX_NUM_SPAD 8 /* There are 8 scratchpads. */		#define PLX_NUM_SPAD 8 /* There are 8 scratchpads. */
#define PLX_NUM_SPAD_PATT 4 /* Use test pattern as 4 more. */		#define PLX_NUM_SPAD_PATT 4 /* Use test pattern as 4 more. */
#define PLX_NUM_DB 16 /* There are 16 doorbells. */		#define PLX_NUM_DB 16 /* There are 16 doorbells. */

		#define PLX_VENDOR_ID 0x10b5

		struct pci_device_table ntb_plx_devs[] = {
		{PCI_DEV(PLX_VENDOR_ID, 0x87a0),
		PCI_DESCR("PLX Non-Transparent Bridge NT0 Link")},
		{PCI_DEV(PLX_VENDOR_ID, 0x87a1),
		PCI_DESCR("PLX Non-Transparent Bridge NT1 Link")},
		{PCI_DEV(PLX_VENDOR_ID, 0x87b0),
		PCI_DESCR("PLX Non-Transparent Bridge NT0 Virtual")},
		{PCI_DEV(PLX_VENDOR_ID, 0x87b1),
		PCI_DESCR("PLX Non-Transparent Bridge NT1 Virtual")}
		};

struct ntb_plx_mw_info {		struct ntb_plx_mw_info {
int mw_bar;		int mw_bar;
int mw_64bit;		int mw_64bit;
int mw_rid;		int mw_rid;
struct resource *mw_res;		struct resource *mw_res;
vm_paddr_t mw_pbase;		vm_paddr_t mw_pbase;
caddr_t mw_vbase;		caddr_t mw_vbase;
vm_size_t mw_size;		vm_size_t mw_size;
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static int ntb_plx_init(device_t dev);		static int ntb_plx_init(device_t dev);
static int ntb_plx_detach(device_t dev);		static int ntb_plx_detach(device_t dev);
static int ntb_plx_mw_set_trans_internal(device_t dev, unsigned mw_idx);		static int ntb_plx_mw_set_trans_internal(device_t dev, unsigned mw_idx);

static int		static int
ntb_plx_probe(device_t dev)		ntb_plx_probe(device_t dev)
{		{
		const struct pci_device_table *ntbplxd;

switch (pci_get_devid(dev)) {		ntbplxd = PCI_MATCH(dev, ntb_plx_devs);
case 0x87a010b5:		if (ntbplxd == NULL)
device_set_desc(dev, "PLX Non-Transparent Bridge NT0 Link");		return (ENXIO);
		device_set_desc(dev, ntbplxd->descr);
return (BUS_PROBE_DEFAULT);		return (BUS_PROBE_DEFAULT);
case 0x87a110b5:
device_set_desc(dev, "PLX Non-Transparent Bridge NT1 Link");
return (BUS_PROBE_DEFAULT);
case 0x87b010b5:
device_set_desc(dev, "PLX Non-Transparent Bridge NT0 Virtual");
return (BUS_PROBE_DEFAULT);
case 0x87b110b5:
device_set_desc(dev, "PLX Non-Transparent Bridge NT1 Virtual");
return (BUS_PROBE_DEFAULT);
}		}
return (ENXIO);
}

static int		static int
ntb_plx_init(device_t dev)		ntb_plx_init(device_t dev)
{		{
struct ntb_plx_softc *sc = device_get_softc(dev);		struct ntb_plx_softc *sc = device_get_softc(dev);
struct ntb_plx_mw_info *mw;		struct ntb_plx_mw_info *mw;
uint64_t val64;		uint64_t val64;
int i;		int i;
▲ Show 20 Lines • Show All 820 Lines • ▼ Show 20 Lines	static device_method_t ntb_plx_methods[] = {
DEVMETHOD(ntb_peer_db_addr, ntb_plx_peer_db_addr),		DEVMETHOD(ntb_peer_db_addr, ntb_plx_peer_db_addr),
DEVMETHOD(ntb_peer_db_set, ntb_plx_peer_db_set),		DEVMETHOD(ntb_peer_db_set, ntb_plx_peer_db_set),
DEVMETHOD_END		DEVMETHOD_END
};		};

static DEFINE_CLASS_0(ntb_hw, ntb_plx_driver, ntb_plx_methods,		static DEFINE_CLASS_0(ntb_hw, ntb_plx_driver, ntb_plx_methods,
sizeof(struct ntb_plx_softc));		sizeof(struct ntb_plx_softc));
DRIVER_MODULE(ntb_hw_plx, pci, ntb_plx_driver, ntb_hw_devclass, NULL, NULL);		DRIVER_MODULE(ntb_hw_plx, pci, ntb_plx_driver, ntb_hw_devclass, NULL, NULL);
		PCI_PNP_INFO(ntb_plx_devs);
MODULE_DEPEND(ntb_hw_plx, ntb, 1, 1, 1);		MODULE_DEPEND(ntb_hw_plx, ntb, 1, 1, 1);
MODULE_VERSION(ntb_hw_plx, 1);		MODULE_VERSION(ntb_hw_plx, 1);