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Show First 20 Lines • Show All 233 Lines • ▼ Show 20 Lines	if (cpu_stdext_feature & CPUID_STDEXT_FSGSBASE)
cr4 \|= CR4_FSGSBASE;		cr4 \|= CR4_FSGSBASE;

/*		/*
* Postpone enabling the SMEP on the boot CPU until the page		* Postpone enabling the SMEP on the boot CPU until the page
* tables are switched from the boot loader identity mapping		* tables are switched from the boot loader identity mapping
* to the kernel tables. The boot loader enables the U bit in		* to the kernel tables. The boot loader enables the U bit in
* its tables.		* its tables.
*/		*/
if (!IS_BSP() && (cpu_stdext_feature & CPUID_STDEXT_SMEP))		if (!IS_BSP()) {
		if (cpu_stdext_feature & CPUID_STDEXT_SMEP)
cr4 \|= CR4_SMEP;		cr4 \|= CR4_SMEP;
		if (cpu_stdext_feature & CPUID_STDEXT_SMAP)
		cr4 \|= CR4_SMAP;
		}
load_cr4(cr4);		load_cr4(cr4);
if (IS_BSP() && (amd_feature & AMDID_NX) != 0) {		if (IS_BSP() && (amd_feature & AMDID_NX) != 0) {
msr = rdmsr(MSR_EFER) \| EFER_NXE;		msr = rdmsr(MSR_EFER) \| EFER_NXE;
wrmsr(MSR_EFER, msr);		wrmsr(MSR_EFER, msr);
pg_nx = PG_NX;		pg_nx = PG_NX;
}		}
hw_ibrs_recalculate();		hw_ibrs_recalculate();
hw_ssb_recalculate(false);		hw_ssb_recalculate(false);
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