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head/sys/sys/bus_dma.h
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/* | /* | ||||
* Free a piece of memory and its allocated dmamap, that was allocated | * Free a piece of memory and its allocated dmamap, that was allocated | ||||
* via bus_dmamem_alloc. | * via bus_dmamem_alloc. | ||||
*/ | */ | ||||
void bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map); | void bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map); | ||||
/* | /* | ||||
* Perform a synchronization operation on the given map. | * Perform a synchronization operation on the given map. If the map | ||||
* is NULL we have a fully IO-coherent system. On every ARM architecture | |||||
* there must be a memory barrier placed to ensure that all data | |||||
* accesses are visible before going any further. | |||||
*/ | */ | ||||
void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_dmasync_op_t); | void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_dmasync_op_t); | ||||
#if defined(__arm__) | |||||
#define __BUS_DMAMAP_SYNC_DEFAULT mb(); | |||||
#elif defined(__aarch64__) | |||||
#define __BUS_DMAMAP_SYNC_DEFAULT dmb(sy); | |||||
#else | |||||
#define __BUS_DMAMAP_SYNC_DEFAULT {} | |||||
#endif | |||||
#define bus_dmamap_sync(dmat, dmamap, op) \ | #define bus_dmamap_sync(dmat, dmamap, op) \ | ||||
do { \ | do { \ | ||||
if ((dmamap) != NULL) \ | if ((dmamap) != NULL) \ | ||||
_bus_dmamap_sync(dmat, dmamap, op); \ | _bus_dmamap_sync(dmat, dmamap, op); \ | ||||
else \ | |||||
__BUS_DMAMAP_SYNC_DEFAULT \ | |||||
} while (0) | } while (0) | ||||
/* | /* | ||||
* Release the mapping held by map. | * Release the mapping held by map. | ||||
*/ | */ | ||||
void _bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map); | void _bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map); | ||||
#define bus_dmamap_unload(dmat, dmamap) \ | #define bus_dmamap_unload(dmat, dmamap) \ | ||||
do { \ | do { \ | ||||
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