Changeset View

Standalone View

Show First 20 Lines • Show All 526 Lines • ▼ Show 20 Lines	for (i = 0; i < MAXCPU; i++) {
if (CPU_ABSENT(i))		if (CPU_ABSENT(i))
continue;		continue;
pc = pcpu_find(i);		pc = pcpu_find(i);
KASSERT(pc != NULL, ("no pcpu data for CPU %u", i));		KASSERT(pc != NULL, ("no pcpu data for CPU %u", i));
cpu = &cpus[pc->pc_apic_id];		cpu = &cpus[pc->pc_apic_id];
if (!cpu->enabled)		if (!cpu->enabled)
panic("SRAT: CPU with APIC ID %u is not known",		panic("SRAT: CPU with APIC ID %u is not known",
pc->pc_apic_id);		pc->pc_apic_id);
		#ifdef NUMA
pc->pc_domain = cpu->domain;		pc->pc_domain = cpu->domain;
CPU_SET(i, &cpuset_domain[cpu->domain]);		#else
		pc->pc_domain = 0;
		#endif
		CPU_SET(i, &cpuset_domain[pc->pc_domain]);
if (bootverbose)		if (bootverbose)
printf("SRAT: CPU %u has memory domain %d\n", i,		printf("SRAT: CPU %u has memory domain %d\n", i,
cpu->domain);		pc->pc_domain);
}		}

/* Last usage of the cpus array, unmap it. */		/* Last usage of the cpus array, unmap it. */
pmap_unmapbios((vm_offset_t)cpus, sizeof(cpus) (max_apic_id + 1));		pmap_unmapbios((vm_offset_t)cpus, sizeof(cpus) (max_apic_id + 1));
cpus = NULL;		cpus = NULL;
}		}
SYSINIT(srat_set_cpus, SI_SUB_CPU, SI_ORDER_ANY, srat_set_cpus, NULL);		SYSINIT(srat_set_cpus, SI_SUB_CPU, SI_ORDER_ANY, srat_set_cpus, NULL);

Show All 28 Lines