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sys/dev/rtwn/rtl8188e/pci/r88ee_init.c

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/*-
* Copyright (c) 2017 Farhan Khan <khanzf@gmail.com>
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include "opt_wlan.h"
#include <sys/param.h>
#include <sys/lock.h>
#include <sys/mutex.h>
#include <sys/mbuf.h>
#include <sys/kernel.h>
#include <sys/socket.h>
#include <sys/systm.h>
#include <sys/malloc.h>
#include <sys/queue.h>
#include <sys/taskqueue.h>
#include <sys/bus.h>
#include <sys/endian.h>
#include <sys/linker.h>
#include <machine/bus.h>
#include <machine/resource.h>
#include <sys/rman.h>
#include <net/if.h>
#include <net/ethernet.h>
#include <net/if_media.h>
#include <net80211/ieee80211_var.h>
#include <net80211/ieee80211_radiotap.h>
#include <dev/rtwn/if_rtwnvar.h>
#include <dev/rtwn/pci/rtwn_pci_var.h>
#include <dev/rtwn/rtl8188e/r88e_reg.h>
#include <dev/rtwn/rtl8192c/r92c.h>
#include <dev/rtwn/rtl8192c/pci/r92ce_reg.h>
#include <dev/rtwn/rtl8192c/pci/r92ce.h>
#include <dev/rtwn/rtl8188e/pci/r88ee.h>
#include <dev/rtwn/rtl8188e/pci/r88ee_reg.h>
#include <dev/rtwn/rtl8188e/pci/r88ee_pwrseq.h>
#include <dev/rtwn/rtl8192c/r92c_var.h>
void
r88ee_init_intr(struct rtwn_softc *sc)
{
/* Disable interrupts. */
rtwn_write_4(sc, R88E_HIMR, 0x200084ff);
rtwn_write_4(sc, R88E_HIMRE, 0x100);
rtwn_write_1(sc, 0x01AF, 0x0);
rtwn_write_4(sc, 0x0058, 0xc0);
}
void
r88ee_init_edca(struct rtwn_softc *sc)
{
rtwn_write_1(sc, R88EE_SIFS_TRX + 1, 0x0a);
rtwn_write_1(sc, R88EE_SIFS_SPEC + 1, 0x0a);
rtwn_write_1(sc, R88EE_SIFS_SPEC_MAC + 1, 0x0a);
rtwn_write_2(sc, R88EE_SIFS_RESP_OFDM, 0x0e0e);
}
int
r88ee_power_on(struct rtwn_softc *sc)
{
uint8_t bytetmp;
bytetmp = rtwn_read_1(sc, R92C_APS_FSMCO + 1) & (~0x80);
rtwn_write_1(sc, R92C_APS_FSMCO + 1, bytetmp);
rtwn_write_1(sc, R92C_RSV_CTRL, 0x00);
/* Power sequence: NIC enable flow */
rtwn_setbits_1(sc, 0x0005, 0x18, 0x0);
if (!r88ee_pwrseq_polling(sc, 0x6, 0x2, 0x2))
return false;
rtwn_setbits_1(sc, 0x0002, 0x3, 0x0);
rtwn_setbits_1(sc, 0x0026, 0x80, 0x80);
rtwn_setbits_1(sc, 0x0005, 0x80, 0x0);
rtwn_setbits_1(sc, 0x0005, 0x18, 0x0);
rtwn_setbits_1(sc, 0x0005, 0x1, 0x1);
if (!r88ee_pwrseq_polling(sc, 0x0005, 0x1, 0x0))
return false;
/* End of power sequence */
bytetmp = rtwn_read_1(sc, R92C_SYS_CLKR);
rtwn_write_1(sc, R92C_SYS_CLKR, bytetmp | 0x08);
bytetmp = rtwn_read_1(sc, R92C_GPIO_MUXCFG+1);
rtwn_write_1(sc, R92C_GPIO_MUXCFG+1, (bytetmp & (~0x10)));
rtwn_write_1(sc, 0x367, 0x80);
rtwn_write_2(sc, R92C_CR, 0x2ff);
rtwn_write_1(sc, R92C_CR+1, 0x06);
rtwn_write_1(sc, R92C_MSR, 0x00);
rtwn_write_4(sc, R92C_INT_MIG, 0);
rtwn_write_1(sc, R92C_PCIE_CTRL_REG+1, 0); /* Enable RX DMA */
rtwn_write_1(sc, 0x04CA, 0x0B);
rtwn_write_4(sc, R92C_RCR, sc->rcr);
rtwn_write_4(sc, R92C_MCUTST_1, 0x0);
return(0);
}
void
r88ee_power_off(struct rtwn_softc *sc)
{
uint32_t count = 0;
uint8_t tmp;
tmp = rtwn_read_1(sc, R88E_TX_RPT_CTRL);
rtwn_write_1(sc, R88E_TX_RPT_CTRL, tmp & (~0x02));
tmp = rtwn_read_1(sc, R92C_TRXDMA_CTRL);
while (!(tmp & 0x02) && (count++ < 100)) {
rtwn_delay(sc, 10);
tmp = rtwn_read_1(sc, R88EE_RXDMA_CTRL);
count++;
}
rtwn_write_1(sc, R92C_PCIE_CTRL_REG+1, 0xFF);
/* Power sequence: Disable NIC LPS enable Flow */
rtwn_setbits_1(sc, 0x0522, 0xff, 0x7f);
avosUnsubmitted
Not Done
Inline Actions

It would be fine to add (macro) names for registers / bitfields if they are (but this can be done later)

avos: It would be fine to add (macro) names for registers / bitfields if they are (but this can be…
farhan_farhan.codesAuthorUnsubmitted
Not Done
Inline Actions

I attempted to search through the Linux and FreeBSD code for a matching register name, but some times I did not find one. Linux uses a lot of hard-coded values. In that situation, what do you suggest I do?

farhan_farhan.codes: I attempted to search through the Linux and FreeBSD code for a matching register name, but some…
r88ee_pwrseq_polling(sc, 0x05f8, 0xff, 0x0);
r88ee_pwrseq_polling(sc, 0x05f9, 0xff, 0x0);
r88ee_pwrseq_polling(sc, 0x05fa, 0xff, 0x0);
r88ee_pwrseq_polling(sc, 0x05fb, 0xff, 0x0);
rtwn_setbits_1(sc, 0x0002, 0x01, 0x00);
rtwn_setbits_1(sc, 0x0100, 0xff, 0x3f);
rtwn_setbits_1(sc, 0x0101, 0x02, 0x00);
rtwn_setbits_1(sc, 0x0553, 0x20, 0x20);
/* End of power sequence */
rtwn_write_1(sc, R92C_RF_CTRL, 0x00);
tmp = rtwn_read_1(sc, R92C_SYS_FUNC_EN+1);
rtwn_write_1(sc, R92C_SYS_FUNC_EN+1, (tmp & (~0x04)));
rtwn_write_1(sc, R92C_SYS_FUNC_EN+1, (tmp | 0x04));
tmp = rtwn_read_1(sc, R92C_SYS_FUNC_EN+1);
rtwn_write_1(sc, R92C_SYS_FUNC_EN + 1, (tmp & (~0x04)));
rtwn_write_1(sc, R92C_MCUFWDL, 0x00);
tmp = rtwn_read_1(sc, R88E_32K_CTRL);
rtwn_write_1(sc, R88E_32K_CTRL, (tmp & (~0x01)));
/* Power sequence: NIC Disable flow */
rtwn_setbits_1(sc, 0x001f, 0xff, 0x00);
rtwn_setbits_1(sc, 0x0023, 0x10, 0x10);
rtwn_setbits_1(sc, 0x0005, 0x02, 0x02);
r88ee_pwrseq_polling(sc, 0x05, 0x02, 0x0);
rtwn_setbits_1(sc, 0x0026, 0x80, 0x80);
/* End of power sequence */
tmp = rtwn_read_1(sc, R92C_RSV_CTRL+1);
rtwn_write_1(sc, R92C_RSV_CTRL+1, (tmp & (~0x08)));
tmp = rtwn_read_1(sc, R92C_RSV_CTRL+1);
rtwn_write_1(sc, R92C_RSV_CTRL+1, (tmp | 0x08));
rtwn_write_1(sc, R92C_RSV_CTRL, 0x0E);
tmp = rtwn_read_1(sc, R92C_GPIO_IN);
rtwn_write_1(sc, R92C_GPIO_OUT, tmp);
rtwn_write_1(sc, R92C_GPIO_IO_SEL, 0x7F);
tmp = rtwn_read_1(sc, R92C_GPIO_IO_SEL);
rtwn_write_1(sc, R92C_GPIO_IO_SEL, (tmp << 4) | tmp);
tmp = rtwn_read_1(sc, R92C_GPIO_IO_SEL+1);
rtwn_write_1(sc, R92C_GPIO_IO_SEL+1, tmp | 0x0F);
rtwn_write_4(sc, R88EE_GPIO_IO_SEL_2+2, 0x00080808);
}
void
r88ee_init_ampdu(struct rtwn_softc *sc)
{
/* Not implemented */
}
void
r88ee_post_init(struct rtwn_softc *sc)
{
rtwn_write_2(sc, R92C_FWHW_TXQ_CTRL,
0x1f00 | R92C_FWHW_TXQ_CTRL_AMPDU_RTY_NEW);
rtwn_write_1(sc, R92C_BCN_MAX_ERR, 0xff);
/* Perform LO and IQ calibrations. */
rtwn_iq_calib(sc);
/* Perform LC calibration. */
rtwn_lc_calib(sc);
r92c_pa_bias_init(sc);
/* Fix for lower temperature. */
rtwn_write_1(sc, 0x15, 0xe9);
#ifndef RTWN_WITHOUT_UCODE
if (sc->sc_flags & RTWN_FW_LOADED) {
struct r92c_softc *rs = sc->sc_priv;
if (sc->sc_ratectl_sysctl == RTWN_RATECTL_FW) {
/* XXX TODO: fix (see comment in r92cu_init.c) */
sc->sc_ratectl = RTWN_RATECTL_NET80211;
} else
sc->sc_ratectl = sc->sc_ratectl_sysctl;
/* Start C2H event handling. */
callout_reset(&rs->rs_c2h_report, rs->rs_c2h_timeout,
r92c_handle_c2h_report, sc);
} else
#endif
sc->sc_ratectl = RTWN_RATECTL_NONE;
}
void
r88ee_init_rx_agg(struct rtwn_softc *sc) {
struct rtwn_pci_softc *pc = sc->sc_priv;
uint16_t tmp;
tmp = rtwn_read_2(sc, R88EE_TRXDMA_CTRL);
tmp &= 0xf;
tmp |= 0xE771;
rtwn_write_2(sc, R88EE_TRXDMA_CTRL, tmp);
rtwn_write_4(sc, R92C_RCR, sc->rcr);
rtwn_write_2(sc, R92C_RXFLTMAP2, 0xffff);
rtwn_write_4(sc, R92C_TCR, pc->tcr);
rtwn_write_1(sc, R92C_PCIE_CTRL_REG+1, 0);
}