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Differential D15768 Diff 43732 head/usr.sbin/bhyve/pci_xhci.c

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head/usr.sbin/bhyve/pci_xhci.c

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static void static void
pci_xhci_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, pci_xhci_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
int baridx, uint64_t offset, int size, uint64_t value) int baridx, uint64_t offset, int size, uint64_t value)
{ {
struct pci_xhci_softc *sc; struct pci_xhci_softc *sc;
sc = pi->pi_arg; sc = pi->pi_arg;
assert(baridx == 0); assert(baridx == 0);
pthread_mutex_lock(&sc->mtx); pthread_mutex_lock(&sc->mtx);
if (offset < XHCI_CAPLEN) /* read only registers */ if (offset < XHCI_CAPLEN) /* read only registers */
WPRINTF(("pci_xhci: write RO-CAPs offset %ld\r\n", offset)); WPRINTF(("pci_xhci: write RO-CAPs offset %ld\r\n", offset));
else if (offset < sc->dboff) else if (offset < sc->dboff)
pci_xhci_hostop_write(sc, offset, value); pci_xhci_hostop_write(sc, offset, value);
else if (offset < sc->rtsoff) else if (offset < sc->rtsoff)
pci_xhci_dbregs_write(sc, offset, value); pci_xhci_dbregs_write(sc, offset, value);
else if (offset < sc->regsend) else if (offset < sc->regsend)
pci_xhci_rtsregs_write(sc, offset, value); pci_xhci_rtsregs_write(sc, offset, value);
else else
WPRINTF(("pci_xhci: write invalid offset %ld\r\n", offset)); WPRINTF(("pci_xhci: write invalid offset %ld\r\n", offset));
pthread_mutex_unlock(&sc->mtx); pthread_mutex_unlock(&sc->mtx);
} }
static uint64_t static uint64_t
pci_xhci_hostcap_read(struct pci_xhci_softc *sc, uint64_t offset) pci_xhci_hostcap_read(struct pci_xhci_softc *sc, uint64_t offset)
{ {
uint64_t value; uint64_t value;
switch (offset) { switch (offset) {
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pci_xhci_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, int baridx, pci_xhci_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, int baridx,
uint64_t offset, int size) uint64_t offset, int size)
{ {
struct pci_xhci_softc *sc; struct pci_xhci_softc *sc;
uint32_t value; uint32_t value;
sc = pi->pi_arg; sc = pi->pi_arg;
assert(baridx == 0); assert(baridx == 0);
pthread_mutex_lock(&sc->mtx); pthread_mutex_lock(&sc->mtx);
if (offset < XHCI_CAPLEN) if (offset < XHCI_CAPLEN)
value = pci_xhci_hostcap_read(sc, offset); value = pci_xhci_hostcap_read(sc, offset);
else if (offset < sc->dboff) else if (offset < sc->dboff)
value = pci_xhci_hostop_read(sc, offset); value = pci_xhci_hostop_read(sc, offset);
else if (offset < sc->rtsoff) else if (offset < sc->rtsoff)
value = pci_xhci_dbregs_read(sc, offset); value = pci_xhci_dbregs_read(sc, offset);
else if (offset < sc->regsend) else if (offset < sc->regsend)
value = pci_xhci_rtsregs_read(sc, offset); value = pci_xhci_rtsregs_read(sc, offset);
else if (offset < (sc->regsend + 4*32)) else if (offset < (sc->regsend + 4*32))
value = pci_xhci_xecp_read(sc, offset); value = pci_xhci_xecp_read(sc, offset);
else { else {
value = 0; value = 0;
WPRINTF(("pci_xhci: read invalid offset %ld\r\n", offset)); WPRINTF(("pci_xhci: read invalid offset %ld\r\n", offset));
} }
pthread_mutex_unlock(&sc->mtx); pthread_mutex_unlock(&sc->mtx);
switch (size) { switch (size) {
case 1: case 1:
value &= 0xFF; value &= 0xFF;
break; break;
case 2: case 2:
value &= 0xFFFF; value &= 0xFFFF;
break; break;
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