Changeset View
Changeset View
Standalone View
Standalone View
sys/dev/mlx4/mlx4_en/mlx4_en_tx.c
Show First 20 Lines • Show All 350 Lines • ▼ Show 20 Lines | |||||
static bool | static bool | ||||
mlx4_en_tx_ring_is_full(struct mlx4_en_tx_ring *ring) | mlx4_en_tx_ring_is_full(struct mlx4_en_tx_ring *ring) | ||||
{ | { | ||||
int wqs; | int wqs; | ||||
wqs = ring->size - (ring->prod - ring->cons); | wqs = ring->size - (ring->prod - ring->cons); | ||||
return (wqs < (HEADROOM + (2 * MLX4_EN_TX_WQE_MAX_WQEBBS))); | return (wqs < (HEADROOM + (2 * MLX4_EN_TX_WQE_MAX_WQEBBS))); | ||||
} | } | ||||
static int mlx4_en_process_tx_cq(struct net_device *dev, | int mlx4_en_process_tx_cq(struct net_device *dev, struct mlx4_en_cq *cq) | ||||
struct mlx4_en_cq *cq) | |||||
{ | { | ||||
struct mlx4_en_priv *priv = netdev_priv(dev); | struct mlx4_en_priv *priv = netdev_priv(dev); | ||||
struct mlx4_cq *mcq = &cq->mcq; | struct mlx4_cq *mcq = &cq->mcq; | ||||
struct mlx4_en_tx_ring *ring = priv->tx_ring[cq->ring]; | struct mlx4_en_tx_ring *ring = priv->tx_ring[cq->ring]; | ||||
struct mlx4_cqe *cqe; | struct mlx4_cqe *cqe; | ||||
u16 index; | u16 index; | ||||
u16 new_index, ring_index, stamp_index; | u16 new_index, ring_index, stamp_index; | ||||
u32 txbbs_skipped = 0; | u32 txbbs_skipped = 0; | ||||
▲ Show 20 Lines • Show All 274 Lines • ▼ Show 20 Lines | #endif | ||||
return ((queue_index % rings_p_up) + (up * rings_p_up)); | return ((queue_index % rings_p_up) + (up * rings_p_up)); | ||||
} | } | ||||
static void mlx4_bf_copy(void __iomem *dst, volatile unsigned long *src, unsigned bytecnt) | static void mlx4_bf_copy(void __iomem *dst, volatile unsigned long *src, unsigned bytecnt) | ||||
{ | { | ||||
__iowrite64_copy(dst, __DEVOLATILE(void *, src), bytecnt / 8); | __iowrite64_copy(dst, __DEVOLATILE(void *, src), bytecnt / 8); | ||||
} | } | ||||
static int mlx4_en_xmit(struct mlx4_en_priv *priv, int tx_ind, struct mbuf **mbp) | int mlx4_en_xmit(struct mlx4_en_priv *priv, int tx_ind, struct mbuf **mbp) | ||||
{ | { | ||||
enum { | enum { | ||||
DS_FACT = TXBB_SIZE / DS_SIZE_ALIGNMENT, | DS_FACT = TXBB_SIZE / DS_SIZE_ALIGNMENT, | ||||
CTRL_FLAGS = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE | | CTRL_FLAGS = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE | | ||||
MLX4_WQE_CTRL_SOLICITED), | MLX4_WQE_CTRL_SOLICITED), | ||||
}; | }; | ||||
bus_dma_segment_t segs[MLX4_EN_TX_MAX_MBUF_FRAGS]; | bus_dma_segment_t segs[MLX4_EN_TX_MAX_MBUF_FRAGS]; | ||||
volatile struct mlx4_wqe_data_seg *dseg; | volatile struct mlx4_wqe_data_seg *dseg; | ||||
▲ Show 20 Lines • Show All 430 Lines • Show Last 20 Lines |