Differential D14746 Diff 41078 head/sys/arm/mv/armada/wdt.c

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head/sys/arm/mv/armada/wdt.c

Show First 20 Lines • Show All 247 Lines • ▼ Show 20 Lines	mv_wdt_enable_armada_38x_xp_helper()
val = read_cpu_misc(RSTOUTn_MASK_ARMV7);		val = read_cpu_misc(RSTOUTn_MASK_ARMV7);
val &= ~RSTOUTn_MASK_WD;		val &= ~RSTOUTn_MASK_WD;
write_cpu_misc(RSTOUTn_MASK_ARMV7, val);		write_cpu_misc(RSTOUTn_MASK_ARMV7, val);
}		}

static void		static void
mv_wdt_enable_armada_38x(void)		mv_wdt_enable_armada_38x(void)
{		{
uint32_t val;		uint32_t val, irq_cause;

		irq_cause = read_cpu_ctrl(BRIDGE_IRQ_CAUSE);
		irq_cause &= IRQ_TIMER_WD_CLR;
		write_cpu_ctrl(BRIDGE_IRQ_CAUSE, irq_cause);

mv_wdt_enable_armada_38x_xp_helper();		mv_wdt_enable_armada_38x_xp_helper();

val = mv_get_timer_control();		val = mv_get_timer_control();
val \|= CPU_TIMER_WD_EN \| CPU_TIMER_WD_AUTO \| CPU_TIMER_WD_25MHZ_EN;		val \|= CPU_TIMER_WD_EN \| CPU_TIMER_WD_AUTO \| CPU_TIMER_WD_25MHZ_EN;
mv_set_timer_control(val);		mv_set_timer_control(val);
}		}

static void		static void
mv_wdt_enable_armada_xp(void)		mv_wdt_enable_armada_xp(void)
{		{
uint32_t val;		uint32_t val, irq_cause;
		irq_cause = read_cpu_ctrl(BRIDGE_IRQ_CAUSE_ARMADAXP);
		irq_cause &= IRQ_TIMER_WD_CLR_ARMADAXP;
		write_cpu_ctrl(BRIDGE_IRQ_CAUSE_ARMADAXP, irq_cause);

mv_wdt_enable_armada_38x_xp_helper();		mv_wdt_enable_armada_38x_xp_helper();

val = mv_get_timer_control();		val = mv_get_timer_control();
val \|= CPU_TIMER2_EN \| CPU_TIMER2_AUTO \| CPU_TIMER_WD_25MHZ_EN;		val \|= CPU_TIMER2_EN \| CPU_TIMER2_AUTO \| CPU_TIMER_WD_25MHZ_EN;
mv_set_timer_control(val);		mv_set_timer_control(val);
}		}

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