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Show First 20 Lines • Show All 233 Lines • ▼ Show 20 Lines	struct cesa_softc {
device_t sc_dev;		device_t sc_dev;
int32_t sc_cid;		int32_t sc_cid;
uint32_t sc_soc_id;		uint32_t sc_soc_id;
struct resource *sc_res[RES_CESA_NUM];		struct resource *sc_res[RES_CESA_NUM];
void *sc_icookie;		void *sc_icookie;
bus_dma_tag_t sc_data_dtag;		bus_dma_tag_t sc_data_dtag;
int sc_error;		int sc_error;
int sc_tperr;		int sc_tperr;
		uint8_t sc_cesa_engine_id;

struct mtx sc_sc_lock;		struct mtx sc_sc_lock;
int sc_blocked;		int sc_blocked;

/* TDMA descriptors pool */		/* TDMA descriptors pool */
struct mtx sc_tdesc_lock;		struct mtx sc_tdesc_lock;
struct cesa_tdma_desc sc_tdesc[CESA_TDMA_DESCRIPTORS];		struct cesa_tdma_desc sc_tdesc[CESA_TDMA_DESCRIPTORS];
struct cesa_dma_mem sc_tdesc_cdm;		struct cesa_dma_mem sc_tdesc_cdm;
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#define CESA_SA_CR 0x0E08		#define CESA_SA_CR 0x0E08
#define CESA_SA_CR_WAIT_FOR_TDMA (1 << 7)		#define CESA_SA_CR_WAIT_FOR_TDMA (1 << 7)
#define CESA_SA_CR_ACTIVATE_TDMA (1 << 9)		#define CESA_SA_CR_ACTIVATE_TDMA (1 << 9)
#define CESA_SA_CR_MULTI_MODE (1 << 11)		#define CESA_SA_CR_MULTI_MODE (1 << 11)

#define CESA_SA_SR 0x0E0C		#define CESA_SA_SR 0x0E0C
#define CESA_SA_SR_ACTIVE (1 << 0)		#define CESA_SA_SR_ACTIVE (1 << 0)

		#define CESA_TDMA_SIZE 0x1000
		#define CESA_CESA_SIZE 0x1000
		#define CESA0_TDMA_ADDR 0x90000
		#define CESA0_CESA_ADDR 0x9D000
		#define CESA1_TDMA_ADDR 0x92000
		#define CESA1_CESA_ADDR 0x9F000
#endif		#endif