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sys/amd64/amd64/fpu.c
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* Enable XSAVE if supported and allowed by user. | * Enable XSAVE if supported and allowed by user. | ||||
* Calculate the xsave_mask. | * Calculate the xsave_mask. | ||||
*/ | */ | ||||
static void | static void | ||||
fpuinit_bsp1(void) | fpuinit_bsp1(void) | ||||
{ | { | ||||
u_int cp[4]; | u_int cp[4]; | ||||
uint64_t xsave_mask_user; | uint64_t xsave_mask_user; | ||||
bool old_wp; | |||||
if ((cpu_feature2 & CPUID2_XSAVE) != 0) { | if ((cpu_feature2 & CPUID2_XSAVE) != 0) { | ||||
use_xsave = 1; | use_xsave = 1; | ||||
TUNABLE_INT_FETCH("hw.use_xsave", &use_xsave); | TUNABLE_INT_FETCH("hw.use_xsave", &use_xsave); | ||||
} | } | ||||
if (!use_xsave) | if (!use_xsave) | ||||
return; | return; | ||||
Show All 12 Lines | if ((xsave_mask & XFEATURE_MPX) != XFEATURE_MPX) | ||||
xsave_mask &= ~XFEATURE_MPX; | xsave_mask &= ~XFEATURE_MPX; | ||||
cpuid_count(0xd, 0x1, cp); | cpuid_count(0xd, 0x1, cp); | ||||
if ((cp[0] & CPUID_EXTSTATE_XSAVEOPT) != 0) { | if ((cp[0] & CPUID_EXTSTATE_XSAVEOPT) != 0) { | ||||
/* | /* | ||||
* Patch the XSAVE instruction in the cpu_switch code | * Patch the XSAVE instruction in the cpu_switch code | ||||
* to XSAVEOPT. We assume that XSAVE encoding used | * to XSAVEOPT. We assume that XSAVE encoding used | ||||
* REX byte, and set the bit 4 of the r/m byte. | * REX byte, and set the bit 4 of the r/m byte. | ||||
* | |||||
* It seems that some BIOSes give control to the OS | |||||
* with CR0.WP already set, making the kernel text | |||||
* read-only before cpu_startup(). | |||||
*/ | */ | ||||
old_wp = disable_wp(); | |||||
ctx_switch_xsave[3] |= 0x10; | ctx_switch_xsave[3] |= 0x10; | ||||
restore_wp(old_wp); | |||||
} | } | ||||
} | } | ||||
/* | /* | ||||
* Calculate the fpu save area size. | * Calculate the fpu save area size. | ||||
*/ | */ | ||||
static void | static void | ||||
fpuinit_bsp2(void) | fpuinit_bsp2(void) | ||||
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