Differential D14720 Diff 40383 contrib/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp

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contrib/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp

Show First 20 Lines • Show All 544 Lines • ▼ Show 20 Lines	void X86DAGToDAGISel::PreprocessISelDAG() {
OptForMinSize = MF->getFunction()->optForMinSize();		OptForMinSize = MF->getFunction()->optForMinSize();
assert((!OptForMinSize \|\| OptForSize) && "OptForMinSize implies OptForSize");		assert((!OptForMinSize \|\| OptForSize) && "OptForMinSize implies OptForSize");

for (SelectionDAG::allnodes_iterator I = CurDAG->allnodes_begin(),		for (SelectionDAG::allnodes_iterator I = CurDAG->allnodes_begin(),
E = CurDAG->allnodes_end(); I != E; ) {		E = CurDAG->allnodes_end(); I != E; ) {
SDNode N = &I++; // Preincrement iterator to avoid invalidation issues.		SDNode N = &I++; // Preincrement iterator to avoid invalidation issues.

if (OptLevel != CodeGenOpt::None &&		if (OptLevel != CodeGenOpt::None &&
// Only does this when target favors doesn't favor register indirect		// Only do this when the target can fold the load into the call or
// call.		// jmp.
		!Subtarget->useRetpoline() &&
((N->getOpcode() == X86ISD::CALL && !Subtarget->callRegIndirect()) \|\|		((N->getOpcode() == X86ISD::CALL && !Subtarget->callRegIndirect()) \|\|
(N->getOpcode() == X86ISD::TC_RETURN &&		(N->getOpcode() == X86ISD::TC_RETURN &&
// Only does this if load can be folded into TC_RETURN.
(Subtarget->is64Bit() \|\|		(Subtarget->is64Bit() \|\|
!getTargetMachine().isPositionIndependent())))) {		!getTargetMachine().isPositionIndependent())))) {
/// Also try moving call address load from outside callseq_start to just		/// Also try moving call address load from outside callseq_start to just
/// before the call to allow it to be folded.		/// before the call to allow it to be folded.
///		///
/// [Load chain]		/// [Load chain]
/// ^		/// ^
/// \|		/// \|
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