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head/lib/libvmmapi/vmmapi.c
Show First 20 Lines • Show All 1,227 Lines • ▼ Show 20 Lines | vm_gla2gpa(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging, | ||||
error = ioctl(ctx->fd, VM_GLA2GPA, &gg); | error = ioctl(ctx->fd, VM_GLA2GPA, &gg); | ||||
if (error == 0) { | if (error == 0) { | ||||
*fault = gg.fault; | *fault = gg.fault; | ||||
*gpa = gg.gpa; | *gpa = gg.gpa; | ||||
} | } | ||||
return (error); | return (error); | ||||
} | } | ||||
int | |||||
vm_gla2gpa_nofault(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging, | |||||
uint64_t gla, int prot, uint64_t *gpa, int *fault) | |||||
{ | |||||
struct vm_gla2gpa gg; | |||||
int error; | |||||
bzero(&gg, sizeof(struct vm_gla2gpa)); | |||||
gg.vcpuid = vcpu; | |||||
gg.prot = prot; | |||||
gg.gla = gla; | |||||
gg.paging = *paging; | |||||
error = ioctl(ctx->fd, VM_GLA2GPA_NOFAULT, &gg); | |||||
if (error == 0) { | |||||
*fault = gg.fault; | |||||
*gpa = gg.gpa; | |||||
} | |||||
return (error); | |||||
} | |||||
#ifndef min | #ifndef min | ||||
#define min(a,b) (((a) < (b)) ? (a) : (b)) | #define min(a,b) (((a) < (b)) ? (a) : (b)) | ||||
#endif | #endif | ||||
int | int | ||||
vm_copy_setup(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging, | vm_copy_setup(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging, | ||||
uint64_t gla, size_t len, int prot, struct iovec *iov, int iovcnt, | uint64_t gla, size_t len, int prot, struct iovec *iov, int iovcnt, | ||||
int *fault) | int *fault) | ||||
▲ Show 20 Lines • Show All 230 Lines • ▼ Show 20 Lines | static const cap_ioctl_t vm_ioctl_cmds[] = { VM_RUN, VM_SUSPEND, VM_REINIT, | ||||
VM_LAPIC_MSI, VM_IOAPIC_ASSERT_IRQ, VM_IOAPIC_DEASSERT_IRQ, | VM_LAPIC_MSI, VM_IOAPIC_ASSERT_IRQ, VM_IOAPIC_DEASSERT_IRQ, | ||||
VM_IOAPIC_PULSE_IRQ, VM_IOAPIC_PINCOUNT, VM_ISA_ASSERT_IRQ, | VM_IOAPIC_PULSE_IRQ, VM_IOAPIC_PINCOUNT, VM_ISA_ASSERT_IRQ, | ||||
VM_ISA_DEASSERT_IRQ, VM_ISA_PULSE_IRQ, VM_ISA_SET_IRQ_TRIGGER, | VM_ISA_DEASSERT_IRQ, VM_ISA_PULSE_IRQ, VM_ISA_SET_IRQ_TRIGGER, | ||||
VM_SET_CAPABILITY, VM_GET_CAPABILITY, VM_BIND_PPTDEV, | VM_SET_CAPABILITY, VM_GET_CAPABILITY, VM_BIND_PPTDEV, | ||||
VM_UNBIND_PPTDEV, VM_MAP_PPTDEV_MMIO, VM_PPTDEV_MSI, | VM_UNBIND_PPTDEV, VM_MAP_PPTDEV_MMIO, VM_PPTDEV_MSI, | ||||
VM_PPTDEV_MSIX, VM_INJECT_NMI, VM_STATS, VM_STAT_DESC, | VM_PPTDEV_MSIX, VM_INJECT_NMI, VM_STATS, VM_STAT_DESC, | ||||
VM_SET_X2APIC_STATE, VM_GET_X2APIC_STATE, | VM_SET_X2APIC_STATE, VM_GET_X2APIC_STATE, | ||||
VM_GET_HPET_CAPABILITIES, VM_GET_GPA_PMAP, VM_GLA2GPA, | VM_GET_HPET_CAPABILITIES, VM_GET_GPA_PMAP, VM_GLA2GPA, | ||||
VM_GLA2GPA_NOFAULT, | |||||
VM_ACTIVATE_CPU, VM_GET_CPUS, VM_SET_INTINFO, VM_GET_INTINFO, | VM_ACTIVATE_CPU, VM_GET_CPUS, VM_SET_INTINFO, VM_GET_INTINFO, | ||||
VM_RTC_WRITE, VM_RTC_READ, VM_RTC_SETTIME, VM_RTC_GETTIME, | VM_RTC_WRITE, VM_RTC_READ, VM_RTC_SETTIME, VM_RTC_GETTIME, | ||||
VM_RESTART_INSTRUCTION }; | VM_RESTART_INSTRUCTION }; | ||||
if (len == NULL) { | if (len == NULL) { | ||||
cmds = malloc(sizeof(vm_ioctl_cmds)); | cmds = malloc(sizeof(vm_ioctl_cmds)); | ||||
if (cmds == NULL) | if (cmds == NULL) | ||||
return (NULL); | return (NULL); | ||||
bcopy(vm_ioctl_cmds, cmds, sizeof(vm_ioctl_cmds)); | bcopy(vm_ioctl_cmds, cmds, sizeof(vm_ioctl_cmds)); | ||||
return (cmds); | return (cmds); | ||||
} | } | ||||
*len = nitems(vm_ioctl_cmds); | *len = nitems(vm_ioctl_cmds); | ||||
return (NULL); | return (NULL); | ||||
} | } | ||||