Differential D14330 Diff 39569 head/sys/powerpc/powernv/platform_powernv.c

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Show First 20 Lines • Show All 133 Lines • ▼ Show 20 Lines	powernv_attach(platform_t plat)
opal_check();		opal_check();

#if BYTE_ORDER == LITTLE_ENDIAN		#if BYTE_ORDER == LITTLE_ENDIAN
opal_call(OPAL_REINIT_CPUS, 2 /* Little endian */);		opal_call(OPAL_REINIT_CPUS, 2 /* Little endian */);
#else		#else
opal_call(OPAL_REINIT_CPUS, 1 /* Big endian */);		opal_call(OPAL_REINIT_CPUS, 1 /* Big endian */);
#endif		#endif

		if (cpu_idle_hook == NULL)
cpu_idle_hook = powernv_cpu_idle;		cpu_idle_hook = powernv_cpu_idle;

powernv_boot_pir = mfspr(SPR_PIR);		powernv_boot_pir = mfspr(SPR_PIR);

/* LPID must not be altered when PSL_DR or PSL_IR is set */		/* LPID must not be altered when PSL_DR or PSL_IR is set */
msr = mfmsr();		msr = mfmsr();
mtmsr(msr & ~(PSL_DR \| PSL_IR));		mtmsr(msr & ~(PSL_DR \| PSL_IR));

/* Direct interrupts to SRR instead of HSRR and reset LPCR otherwise */		/* Direct interrupts to SRR instead of HSRR and reset LPCR otherwise */
mtspr(SPR_LPID, 0);		mtspr(SPR_LPID, 0);
isync();		isync();

mtmsr(msr);

mtspr(SPR_LPCR, LPCR_LPES);		mtspr(SPR_LPCR, LPCR_LPES);
isync();		isync();

		mtmsr(msr);

/* Init CPU bits */		/* Init CPU bits */
powernv_smp_ap_init(plat);		powernv_smp_ap_init(plat);

powernv_cpuref_init();		powernv_cpuref_init();

/* Set SLB count from device tree */		/* Set SLB count from device tree */
cpu = OF_peer(0);		cpu = OF_peer(0);
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