Changeset View
Changeset View
Standalone View
Standalone View
head/sys/arm64/arm64/pmap.c
Show First 20 Lines • Show All 1,356 Lines • ▼ Show 20 Lines | if (m->pindex < NUL2E) { | ||||
l0 = pmap_l0(pmap, va); | l0 = pmap_l0(pmap, va); | ||||
tl0 = pmap_load(l0); | tl0 = pmap_load(l0); | ||||
l1pg = PHYS_TO_VM_PAGE(tl0 & ~ATTR_MASK); | l1pg = PHYS_TO_VM_PAGE(tl0 & ~ATTR_MASK); | ||||
pmap_unwire_l3(pmap, va, l1pg, free); | pmap_unwire_l3(pmap, va, l1pg, free); | ||||
} | } | ||||
pmap_invalidate_page(pmap, va); | pmap_invalidate_page(pmap, va); | ||||
/* | atomic_subtract_int(&vm_cnt.v_wire_count, 1); | ||||
* This is a release store so that the ordinary store unmapping | |||||
* the page table page is globally performed before TLB shoot- | |||||
* down is begun. | |||||
*/ | |||||
atomic_subtract_rel_int(&vm_cnt.v_wire_count, 1); | |||||
/* | /* | ||||
* Put page on a list so that it is released after | * Put page on a list so that it is released after | ||||
* *ALL* TLB shootdown is done | * *ALL* TLB shootdown is done | ||||
*/ | */ | ||||
pmap_add_delayed_free_list(m, free, TRUE); | pmap_add_delayed_free_list(m, free, TRUE); | ||||
} | } | ||||
▲ Show 20 Lines • Show All 109 Lines • ▼ Show 20 Lines | if (ptepindex >= (NUL2E + NUL1E)) { | ||||
l0index = l1index >> L0_ENTRIES_SHIFT; | l0index = l1index >> L0_ENTRIES_SHIFT; | ||||
l0 = &pmap->pm_l0[l0index]; | l0 = &pmap->pm_l0[l0index]; | ||||
tl0 = pmap_load(l0); | tl0 = pmap_load(l0); | ||||
if (tl0 == 0) { | if (tl0 == 0) { | ||||
/* recurse for allocating page dir */ | /* recurse for allocating page dir */ | ||||
if (_pmap_alloc_l3(pmap, NUL2E + NUL1E + l0index, | if (_pmap_alloc_l3(pmap, NUL2E + NUL1E + l0index, | ||||
lockp) == NULL) { | lockp) == NULL) { | ||||
--m->wire_count; | vm_page_unwire_noq(m); | ||||
/* XXX: release mem barrier? */ | |||||
atomic_subtract_int(&vm_cnt.v_wire_count, 1); | |||||
vm_page_free_zero(m); | vm_page_free_zero(m); | ||||
return (NULL); | return (NULL); | ||||
} | } | ||||
} else { | } else { | ||||
l1pg = PHYS_TO_VM_PAGE(tl0 & ~ATTR_MASK); | l1pg = PHYS_TO_VM_PAGE(tl0 & ~ATTR_MASK); | ||||
l1pg->wire_count++; | l1pg->wire_count++; | ||||
} | } | ||||
Show All 9 Lines | if (ptepindex >= (NUL2E + NUL1E)) { | ||||
l0index = l1index >> L0_ENTRIES_SHIFT; | l0index = l1index >> L0_ENTRIES_SHIFT; | ||||
l0 = &pmap->pm_l0[l0index]; | l0 = &pmap->pm_l0[l0index]; | ||||
tl0 = pmap_load(l0); | tl0 = pmap_load(l0); | ||||
if (tl0 == 0) { | if (tl0 == 0) { | ||||
/* recurse for allocating page dir */ | /* recurse for allocating page dir */ | ||||
if (_pmap_alloc_l3(pmap, NUL2E + l1index, | if (_pmap_alloc_l3(pmap, NUL2E + l1index, | ||||
lockp) == NULL) { | lockp) == NULL) { | ||||
--m->wire_count; | vm_page_unwire_noq(m); | ||||
atomic_subtract_int(&vm_cnt.v_wire_count, 1); | |||||
vm_page_free_zero(m); | vm_page_free_zero(m); | ||||
return (NULL); | return (NULL); | ||||
} | } | ||||
tl0 = pmap_load(l0); | tl0 = pmap_load(l0); | ||||
l1 = (pd_entry_t *)PHYS_TO_DMAP(tl0 & ~ATTR_MASK); | l1 = (pd_entry_t *)PHYS_TO_DMAP(tl0 & ~ATTR_MASK); | ||||
l1 = &l1[l1index & Ln_ADDR_MASK]; | l1 = &l1[l1index & Ln_ADDR_MASK]; | ||||
} else { | } else { | ||||
l1 = (pd_entry_t *)PHYS_TO_DMAP(tl0 & ~ATTR_MASK); | l1 = (pd_entry_t *)PHYS_TO_DMAP(tl0 & ~ATTR_MASK); | ||||
l1 = &l1[l1index & Ln_ADDR_MASK]; | l1 = &l1[l1index & Ln_ADDR_MASK]; | ||||
tl1 = pmap_load(l1); | tl1 = pmap_load(l1); | ||||
if (tl1 == 0) { | if (tl1 == 0) { | ||||
/* recurse for allocating page dir */ | /* recurse for allocating page dir */ | ||||
if (_pmap_alloc_l3(pmap, NUL2E + l1index, | if (_pmap_alloc_l3(pmap, NUL2E + l1index, | ||||
lockp) == NULL) { | lockp) == NULL) { | ||||
--m->wire_count; | vm_page_unwire_noq(m); | ||||
/* XXX: release mem barrier? */ | |||||
atomic_subtract_int( | |||||
&vm_cnt.v_wire_count, 1); | |||||
vm_page_free_zero(m); | vm_page_free_zero(m); | ||||
return (NULL); | return (NULL); | ||||
} | } | ||||
} else { | } else { | ||||
l2pg = PHYS_TO_VM_PAGE(tl1 & ~ATTR_MASK); | l2pg = PHYS_TO_VM_PAGE(tl1 & ~ATTR_MASK); | ||||
l2pg->wire_count++; | l2pg->wire_count++; | ||||
} | } | ||||
} | } | ||||
▲ Show 20 Lines • Show All 91 Lines • ▼ Show 20 Lines | pmap_release(pmap_t pmap) | ||||
KASSERT(pmap->pm_stats.resident_count == 0, | KASSERT(pmap->pm_stats.resident_count == 0, | ||||
("pmap_release: pmap resident count %ld != 0", | ("pmap_release: pmap resident count %ld != 0", | ||||
pmap->pm_stats.resident_count)); | pmap->pm_stats.resident_count)); | ||||
KASSERT(vm_radix_is_empty(&pmap->pm_root), | KASSERT(vm_radix_is_empty(&pmap->pm_root), | ||||
("pmap_release: pmap has reserved page table page(s)")); | ("pmap_release: pmap has reserved page table page(s)")); | ||||
m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pmap->pm_l0)); | m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pmap->pm_l0)); | ||||
m->wire_count--; | vm_page_unwire_noq(m); | ||||
atomic_subtract_int(&vm_cnt.v_wire_count, 1); | |||||
vm_page_free_zero(m); | vm_page_free_zero(m); | ||||
} | } | ||||
static int | static int | ||||
kvm_size(SYSCTL_HANDLER_ARGS) | kvm_size(SYSCTL_HANDLER_ARGS) | ||||
{ | { | ||||
unsigned long ksize = VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS; | unsigned long ksize = VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS; | ||||
▲ Show 20 Lines • Show All 3,262 Lines • Show Last 20 Lines |