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Differential D14053 Diff 38591 head/sys/dev/nvme/nvme_ctrlr.c

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head/sys/dev/nvme/nvme_ctrlr.c

Show First 20 Lines • Show All 398 Lines • ▼ Show 20 Linesnvme_ctrlr_reset(struct nvme_controller *ctrlr)
taskqueue_enqueue(ctrlr->taskqueue, &ctrlr->reset_task); taskqueue_enqueue(ctrlr->taskqueue, &ctrlr->reset_task);
} }
static int static int
nvme_ctrlr_identify(struct nvme_controller *ctrlr) nvme_ctrlr_identify(struct nvme_controller *ctrlr)
{ {
struct nvme_completion_poll_status status; struct nvme_completion_poll_status status;
status.done = FALSE; status.done = 0;
nvme_ctrlr_cmd_identify_controller(ctrlr, &ctrlr->cdata, nvme_ctrlr_cmd_identify_controller(ctrlr, &ctrlr->cdata,
nvme_completion_poll_cb, &status); nvme_completion_poll_cb, &status);
while (status.done == FALSE) while (!atomic_load_acq_int(&status.done))
pause("nvme", 1); pause("nvme", 1);
if (nvme_completion_is_error(&status.cpl)) { if (nvme_completion_is_error(&status.cpl)) {
nvme_printf(ctrlr, "nvme_identify_controller failed!\n"); nvme_printf(ctrlr, "nvme_identify_controller failed!\n");
return (ENXIO); return (ENXIO);
} }
/* /*
* Use MDTS to ensure our default max_xfer_size doesn't exceed what the * Use MDTS to ensure our default max_xfer_size doesn't exceed what the
* controller supports. * controller supports.
*/ */
if (ctrlr->cdata.mdts > 0) if (ctrlr->cdata.mdts > 0)
ctrlr->max_xfer_size = min(ctrlr->max_xfer_size, ctrlr->max_xfer_size = min(ctrlr->max_xfer_size,
ctrlr->min_page_size * (1 << (ctrlr->cdata.mdts))); ctrlr->min_page_size * (1 << (ctrlr->cdata.mdts)));
return (0); return (0);
} }
static int static int
nvme_ctrlr_set_num_qpairs(struct nvme_controller *ctrlr) nvme_ctrlr_set_num_qpairs(struct nvme_controller *ctrlr)
{ {
struct nvme_completion_poll_status status; struct nvme_completion_poll_status status;
int cq_allocated, sq_allocated; int cq_allocated, sq_allocated;
status.done = FALSE; status.done = 0;
nvme_ctrlr_cmd_set_num_queues(ctrlr, ctrlr->num_io_queues, nvme_ctrlr_cmd_set_num_queues(ctrlr, ctrlr->num_io_queues,
nvme_completion_poll_cb, &status); nvme_completion_poll_cb, &status);
while (status.done == FALSE) while (!atomic_load_acq_int(&status.done))
pause("nvme", 1); pause("nvme", 1);
if (nvme_completion_is_error(&status.cpl)) { if (nvme_completion_is_error(&status.cpl)) {
nvme_printf(ctrlr, "nvme_ctrlr_set_num_qpairs failed!\n"); nvme_printf(ctrlr, "nvme_ctrlr_set_num_qpairs failed!\n");
return (ENXIO); return (ENXIO);
} }
/* /*
* Data in cdw0 is 0-based. * Data in cdw0 is 0-based.
Show All 19 Lines
{ {
struct nvme_completion_poll_status status; struct nvme_completion_poll_status status;
struct nvme_qpair *qpair; struct nvme_qpair *qpair;
int i; int i;
for (i = 0; i < ctrlr->num_io_queues; i++) { for (i = 0; i < ctrlr->num_io_queues; i++) {
qpair = &ctrlr->ioq[i]; qpair = &ctrlr->ioq[i];
status.done = FALSE; status.done = 0;
nvme_ctrlr_cmd_create_io_cq(ctrlr, qpair, qpair->vector, nvme_ctrlr_cmd_create_io_cq(ctrlr, qpair, qpair->vector,
nvme_completion_poll_cb, &status); nvme_completion_poll_cb, &status);
while (status.done == FALSE) while (!atomic_load_acq_int(&status.done))
pause("nvme", 1); pause("nvme", 1);
if (nvme_completion_is_error(&status.cpl)) { if (nvme_completion_is_error(&status.cpl)) {
nvme_printf(ctrlr, "nvme_create_io_cq failed!\n"); nvme_printf(ctrlr, "nvme_create_io_cq failed!\n");
return (ENXIO); return (ENXIO);
} }
status.done = FALSE; status.done = 0;
nvme_ctrlr_cmd_create_io_sq(qpair->ctrlr, qpair, nvme_ctrlr_cmd_create_io_sq(qpair->ctrlr, qpair,
nvme_completion_poll_cb, &status); nvme_completion_poll_cb, &status);
while (status.done == FALSE) while (!atomic_load_acq_int(&status.done))
pause("nvme", 1); pause("nvme", 1);
if (nvme_completion_is_error(&status.cpl)) { if (nvme_completion_is_error(&status.cpl)) {
nvme_printf(ctrlr, "nvme_create_io_sq failed!\n"); nvme_printf(ctrlr, "nvme_create_io_sq failed!\n");
return (ENXIO); return (ENXIO);
} }
} }
return (0); return (0);
▲ Show 20 Lines • Show All 193 Lines • ▼ Show 20 Lines
{ {
struct nvme_completion_poll_status status; struct nvme_completion_poll_status status;
struct nvme_async_event_request *aer; struct nvme_async_event_request *aer;
uint32_t i; uint32_t i;
ctrlr->async_event_config.raw = 0xFF; ctrlr->async_event_config.raw = 0xFF;
ctrlr->async_event_config.bits.reserved = 0; ctrlr->async_event_config.bits.reserved = 0;
status.done = FALSE; status.done = 0;
nvme_ctrlr_cmd_get_feature(ctrlr, NVME_FEAT_TEMPERATURE_THRESHOLD, nvme_ctrlr_cmd_get_feature(ctrlr, NVME_FEAT_TEMPERATURE_THRESHOLD,
0, NULL, 0, nvme_completion_poll_cb, &status); 0, NULL, 0, nvme_completion_poll_cb, &status);
while (status.done == FALSE) while (!atomic_load_acq_int(&status.done))
pause("nvme", 1); pause("nvme", 1);
if (nvme_completion_is_error(&status.cpl) || if (nvme_completion_is_error(&status.cpl) ||
(status.cpl.cdw0 & 0xFFFF) == 0xFFFF || (status.cpl.cdw0 & 0xFFFF) == 0xFFFF ||
(status.cpl.cdw0 & 0xFFFF) == 0x0000) { (status.cpl.cdw0 & 0xFFFF) == 0x0000) {
nvme_printf(ctrlr, "temperature threshold not supported\n"); nvme_printf(ctrlr, "temperature threshold not supported\n");
ctrlr->async_event_config.bits.temperature = 0; ctrlr->async_event_config.bits.temperature = 0;
} }
▲ Show 20 Lines • Show All 592 Lines • Show Last 20 Lines