Differential D13985 Diff 38261 sys/amd64/amd64/support.S

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sys/amd64/amd64/support.S

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	* MSR operations fault handler			* MSR operations fault handler
	*/			*/
	ALIGN_TEXT			ALIGN_TEXT
	msr_onfault:			msr_onfault:
	movq $0,PCB_ONFAULT(%r8)			movq $0,PCB_ONFAULT(%r8)
	movl $EFAULT,%eax			movl $EFAULT,%eax
	POP_FRAME_POINTER			POP_FRAME_POINTER
	ret			ret

				ALIGN_TEXT
				ENTRY(pmap_pti_pcid_invalidate)
				markjUnsubmitted Not Done Inline Actions Can't these routines be implemented in C? markj: Can't these routines be implemented in C?
				kibAuthorUnsubmitted Not Done Inline Actions This is quite risky. We are temporary swapping address spaces there, in particular, we enter the AS where the C stack is not mapped. I absolutely need to ensure that the routines do not access anything outside the explicitly allowed addresses while on user page table. kib: This is quite risky. We are temporary swapping address spaces there, in particular, we enter…
				markjUnsubmitted Done Inline Actions Could you please add prototypes like in the functions above and in cpu_switch.S? markj: Could you please add prototypes like in the functions above and in cpu_switch.S?
				markjUnsubmitted Not Done Inline Actions Hm, so isn't this unsafe wrt NMIs? markj: Hm, so isn't this unsafe wrt NMIs?
				markjUnsubmitted Not Done Inline Actions Never mind, sorry. I forgot that the NMI handler reloads from KCR3. markj: Never mind, sorry. I forgot that the NMI handler reloads from KCR3.
				kibAuthorUnsubmitted Not Done Inline Actions Yes, there are many more places where kernel is executing with UCR3, and NMI/MCE handlers already handle that. kib: Yes, there are many more places where kernel is executing with UCR3, and NMI/MCE handlers…
				pushfq
				cli
				movq %rdi,%cr3 /* to user page table */
				movq %rsi,%cr3 /* back to kernel */
				popfq
				retq

				ALIGN_TEXT
				ENTRY(pmap_pti_pcid_invlpg)
				pushfq
				cli
				movq %rdi,%cr3 /* to user page table */
				invlpg (%rdx)
				movq %rsi,%cr3 /* back to kernel */
				popfq
				retq

				ALIGN_TEXT
				ENTRY(pmap_pti_pcid_invlrng)
				pushfq
				cli
				movq %rdi,%cr3 /* to user page table */
				1: invlpg (%rdx)
				addq $PAGE_SIZE,%rdx
				cmpq %rdx,%rcx
				ja 1b
				movq %rsi,%cr3 /* back to kernel */
				popfq
				retq