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sys/amd64/amd64/apic_vector.S
| Show First 20 Lines • Show All 179 Lines • ▼ Show 20 Lines | invltlb_ret: | ||||
| call invltlb_handler | call invltlb_handler | ||||
| jmp invltlb_ret | jmp invltlb_ret | ||||
| INTR_HANDLER invltlb_pcid | INTR_HANDLER invltlb_pcid | ||||
| call invltlb_pcid_handler | call invltlb_pcid_handler | ||||
| jmp invltlb_ret | jmp invltlb_ret | ||||
| INTR_HANDLER invltlb_invpcid | INTR_HANDLER invltlb_invpcid | ||||
| cmpb $0,pti(%rip) | |||||
markj: Is there a reason for not having a separate PTI entry point, as you do for invlpg and invlrng? | |||||
| jne 1f | |||||
| call invltlb_invpcid_handler | call invltlb_invpcid_handler | ||||
| jmp invltlb_ret | jmp invltlb_ret | ||||
| 1: call invltlb_invpcid_pti_handler | |||||
| jmp invltlb_ret | |||||
| /* | /* | ||||
| * Single page TLB shootdown | * Single page TLB shootdown | ||||
| */ | */ | ||||
| INTR_HANDLER invlpg | INTR_HANDLER invlpg | ||||
| call invlpg_handler | call invlpg_handler | ||||
| jmp invltlb_ret | jmp invltlb_ret | ||||
| INTR_HANDLER invlpg_invpcid_pti | |||||
| call invlpg_invpcid_pti_handler | |||||
| jmp invltlb_ret | |||||
| INTR_HANDLER invlpg_pcid_pti | |||||
| call invlpg_pcid_pti_handler | |||||
| jmp invltlb_ret | |||||
| /* | /* | ||||
| * Page range TLB shootdown. | * Page range TLB shootdown. | ||||
| */ | */ | ||||
| INTR_HANDLER invlrng | INTR_HANDLER invlrng | ||||
| call invlrng_handler | call invlrng_handler | ||||
| jmp invltlb_ret | |||||
| INTR_HANDLER invlrng_invpcid_pti | |||||
| call invlrng_invpcid_pti_handler | |||||
| jmp invltlb_ret | |||||
| INTR_HANDLER invlrng_pcid_pti | |||||
| call invlrng_pcid_pti_handler | |||||
| jmp invltlb_ret | jmp invltlb_ret | ||||
| /* | /* | ||||
| * Invalidate cache. | * Invalidate cache. | ||||
| */ | */ | ||||
| INTR_HANDLER invlcache | INTR_HANDLER invlcache | ||||
| call invlcache_handler | call invlcache_handler | ||||
| jmp invltlb_ret | jmp invltlb_ret | ||||
| ▲ Show 20 Lines • Show All 77 Lines • Show Last 20 Lines | |||||
Is there a reason for not having a separate PTI entry point, as you do for invlpg and invlrng?