Changeset View
Changeset View
Standalone View
Standalone View
sys/dev/bwn/if_bwnvar.h
Show All 28 Lines | |||||
* THE POSSIBILITY OF SUCH DAMAGES. | * THE POSSIBILITY OF SUCH DAMAGES. | ||||
* | * | ||||
* $FreeBSD$ | * $FreeBSD$ | ||||
*/ | */ | ||||
#ifndef _IF_BWNVAR_H | #ifndef _IF_BWNVAR_H | ||||
#define _IF_BWNVAR_H | #define _IF_BWNVAR_H | ||||
#include "if_bwn_siba.h" | #include <dev/bhnd/bhnd.h> | ||||
struct bwn_softc; | struct bwn_softc; | ||||
struct bwn_mac; | struct bwn_mac; | ||||
extern driver_t bwn_driver; | |||||
int bwn_attach(device_t dev); | |||||
int bwn_detach(device_t dev); | |||||
#define N(a) (sizeof(a) / sizeof(a[0])) | #define N(a) (sizeof(a) / sizeof(a[0])) | ||||
#define BWN_ALIGN 0x1000 | #define BWN_ALIGN 0x1000 | ||||
#define BWN_BUS_SPACE_MAXADDR_30BIT 0x3fffffff | |||||
#define BWN_RETRY_SHORT 7 | #define BWN_RETRY_SHORT 7 | ||||
#define BWN_RETRY_LONG 4 | #define BWN_RETRY_LONG 4 | ||||
#define BWN_STAID_MAX 64 | #define BWN_STAID_MAX 64 | ||||
#define BWN_TXPWR_IGNORE_TIME (1 << 0) | #define BWN_TXPWR_IGNORE_TIME (1 << 0) | ||||
#define BWN_TXPWR_IGNORE_TSSI (1 << 1) | #define BWN_TXPWR_IGNORE_TSSI (1 << 1) | ||||
#define BWN_HAS_TXMAG(phy) \ | #define BWN_HAS_TXMAG(phy) \ | ||||
(((phy)->rev >= 2) && ((phy)->rf_ver == 0x2050) && \ | (((phy)->rev >= 2) && ((phy)->rf_ver == 0x2050) && \ | ||||
((phy)->rf_rev == 8)) | ((phy)->rf_rev == 8)) | ||||
Show All 10 Lines | #define BWN_TSSI2DBM(num, den) \ | ||||
((int32_t)((num < 0) ? num / den : (num + den / 2) / den)) | ((int32_t)((num < 0) ? num / den : (num + den / 2) / den)) | ||||
#define BWN_HDRSIZE(mac) bwn_tx_hdrsize(mac) | #define BWN_HDRSIZE(mac) bwn_tx_hdrsize(mac) | ||||
#define BWN_MAXTXHDRSIZE (112 + (sizeof(struct bwn_plcp6))) | #define BWN_MAXTXHDRSIZE (112 + (sizeof(struct bwn_plcp6))) | ||||
#define BWN_PIO_COOKIE(tq, tp) \ | #define BWN_PIO_COOKIE(tq, tp) \ | ||||
((uint16_t)((((uint16_t)tq->tq_index + 1) << 12) | tp->tp_index)) | ((uint16_t)((((uint16_t)tq->tq_index + 1) << 12) | tp->tp_index)) | ||||
#define BWN_DMA_COOKIE(dr, slot) \ | #define BWN_DMA_COOKIE(dr, slot) \ | ||||
((uint16_t)(((uint16_t)dr->dr_index + 1) << 12) | (uint16_t)slot) | ((uint16_t)(((uint16_t)dr->dr_index + 1) << 12) | (uint16_t)slot) | ||||
#define BWN_READ_2(mac, o) (siba_read_2(mac->mac_sc->sc_dev, o)) | #define BWN_READ_2(mac, o) \ | ||||
#define BWN_READ_4(mac, o) (siba_read_4(mac->mac_sc->sc_dev, o)) | (bus_read_2((mac)->mac_sc->sc_mem_res, (o))) | ||||
#define BWN_READ_4(mac, o) \ | |||||
(bus_read_4((mac)->mac_sc->sc_mem_res, (o))) | |||||
#define BWN_WRITE_2(mac, o, v) \ | #define BWN_WRITE_2(mac, o, v) \ | ||||
(siba_write_2(mac->mac_sc->sc_dev, o, v)) | (bus_write_2((mac)->mac_sc->sc_mem_res, (o), (v))) | ||||
#define BWN_WRITE_2_F(mac, o, v) do { \ | #define BWN_WRITE_2_F(mac, o, v) do { \ | ||||
(BWN_WRITE_2(mac, o, v)); \ | (BWN_WRITE_2(mac, o, v)); \ | ||||
BWN_READ_2(mac, o); \ | BWN_READ_2(mac, o); \ | ||||
} while(0) | } while(0) | ||||
#define BWN_WRITE_SETMASK2(mac, offset, mask, set) \ | #define BWN_WRITE_SETMASK2(mac, offset, mask, set) \ | ||||
BWN_WRITE_2(mac, offset, (BWN_READ_2(mac, offset) & mask) | set) | BWN_WRITE_2(mac, offset, (BWN_READ_2(mac, offset) & mask) | set) | ||||
#define BWN_WRITE_4(mac, o, v) \ | #define BWN_WRITE_4(mac, o, v) \ | ||||
(siba_write_4(mac->mac_sc->sc_dev, o, v)) | (bus_write_4((mac)->mac_sc->sc_mem_res, (o), (v))) | ||||
#define BWN_WRITE_SETMASK4(mac, offset, mask, set) \ | #define BWN_WRITE_SETMASK4(mac, offset, mask, set) \ | ||||
BWN_WRITE_4(mac, offset, (BWN_READ_4(mac, offset) & mask) | set) | BWN_WRITE_4(mac, offset, (BWN_READ_4(mac, offset) & mask) | set) | ||||
#define BWN_PIO_TXQOFFSET(mac) \ | #define BWN_PIO_TXQOFFSET(mac) \ | ||||
((siba_get_revid(mac->mac_sc->sc_dev) >= 11) ? 0x18 : 0) | ((bhnd_get_hwrev(mac->mac_sc->sc_dev) >= 11) ? 0x18 : 0) | ||||
#define BWN_PIO_RXQOFFSET(mac) \ | #define BWN_PIO_RXQOFFSET(mac) \ | ||||
((siba_get_revid(mac->mac_sc->sc_dev) >= 11) ? 0x38 : 8) | ((bhnd_get_hwrev(mac->mac_sc->sc_dev) >= 11) ? 0x38 : 8) | ||||
#define BWN_SEC_NEWAPI(mac) (mac->mac_fw.rev >= 351) | #define BWN_SEC_NEWAPI(mac) (mac->mac_fw.rev >= 351) | ||||
#define BWN_SEC_KEY2FW(mac, idx) \ | #define BWN_SEC_KEY2FW(mac, idx) \ | ||||
(BWN_SEC_NEWAPI(mac) ? idx : ((idx >= 4) ? idx - 4 : idx)) | (BWN_SEC_NEWAPI(mac) ? idx : ((idx >= 4) ? idx - 4 : idx)) | ||||
#define BWN_RF_READ(mac, r) (mac->mac_phy.rf_read(mac, r)) | #define BWN_RF_READ(mac, r) (mac->mac_phy.rf_read(mac, r)) | ||||
#define BWN_RF_WRITE(mac, r, v) (mac->mac_phy.rf_write(mac, r, v)) | #define BWN_RF_WRITE(mac, r, v) (mac->mac_phy.rf_write(mac, r, v)) | ||||
#define BWN_RF_MASK(mac, o, m) \ | #define BWN_RF_MASK(mac, o, m) \ | ||||
BWN_RF_WRITE(mac, o, BWN_RF_READ(mac, o) & m) | BWN_RF_WRITE(mac, o, BWN_RF_READ(mac, o) & m) | ||||
#define BWN_RF_SETMASK(mac, offset, mask, set) \ | #define BWN_RF_SETMASK(mac, offset, mask, set) \ | ||||
Show All 37 Lines | #define BWN_PHY_COPY(mac, dst, src) do { \ | ||||
KASSERT(mac->mac_status < BWN_MAC_STATUS_INITED || \ | KASSERT(mac->mac_status < BWN_MAC_STATUS_INITED || \ | ||||
mac->mac_suspended > 0, \ | mac->mac_suspended > 0, \ | ||||
("dont access PHY or RF registers after turning on MAC")); \ | ("dont access PHY or RF registers after turning on MAC")); \ | ||||
BWN_PHY_WRITE(mac, dst, BWN_PHY_READ(mac, src)); \ | BWN_PHY_WRITE(mac, dst, BWN_PHY_READ(mac, src)); \ | ||||
} while (0) | } while (0) | ||||
#define BWN_LO_CALIB_EXPIRE (1000 * (30 - 2)) | #define BWN_LO_CALIB_EXPIRE (1000 * (30 - 2)) | ||||
#define BWN_LO_PWRVEC_EXPIRE (1000 * (30 - 2)) | #define BWN_LO_PWRVEC_EXPIRE (1000 * (30 - 2)) | ||||
#define BWN_LO_TXCTL_EXPIRE (1000 * (180 - 4)) | #define BWN_LO_TXCTL_EXPIRE (1000 * (180 - 4)) | ||||
#define BWN_DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) | |||||
#define BWN_LPD(L, P, D) (((L) << 2) | ((P) << 1) | ((D) << 0)) | #define BWN_LPD(L, P, D) (((L) << 2) | ((P) << 1) | ((D) << 0)) | ||||
#define BWN_BITREV4(tmp) (BWN_BITREV8(tmp) >> 4) | #define BWN_BITREV4(tmp) (BWN_BITREV8(tmp) >> 4) | ||||
#define BWN_BITREV8(byte) (bwn_bitrev_table[byte]) | #define BWN_BITREV8(byte) (bwn_bitrev_table[byte]) | ||||
#define BWN_BBATTCMP(a, b) ((a)->att == (b)->att) | #define BWN_BBATTCMP(a, b) ((a)->att == (b)->att) | ||||
#define BWN_RFATTCMP(a, b) \ | #define BWN_RFATTCMP(a, b) \ | ||||
(((a)->att == (b)->att) && ((a)->padmix == (b)->padmix)) | (((a)->att == (b)->att) && ((a)->padmix == (b)->padmix)) | ||||
#define BWN_PIO_WRITE_2(mac, tq, offset, value) \ | #define BWN_PIO_WRITE_2(mac, tq, offset, value) \ | ||||
BWN_WRITE_2(mac, (tq)->tq_base + offset, value) | BWN_WRITE_2(mac, (tq)->tq_base + offset, value) | ||||
#define BWN_PIO_READ_4(mac, tq, offset) \ | #define BWN_PIO_READ_4(mac, tq, offset) \ | ||||
BWN_READ_4(mac, tq->tq_base + offset) | BWN_READ_4(mac, tq->tq_base + offset) | ||||
#define BWN_ISCCKRATE(rate) \ | #define BWN_ISCCKRATE(rate) \ | ||||
(rate == BWN_CCK_RATE_1MB || rate == BWN_CCK_RATE_2MB || \ | (rate == BWN_CCK_RATE_1MB || rate == BWN_CCK_RATE_2MB || \ | ||||
rate == BWN_CCK_RATE_5MB || rate == BWN_CCK_RATE_11MB) | rate == BWN_CCK_RATE_5MB || rate == BWN_CCK_RATE_11MB) | ||||
#define BWN_ISOFDMRATE(rate) (!BWN_ISCCKRATE(rate)) | #define BWN_ISOFDMRATE(rate) (!BWN_ISCCKRATE(rate)) | ||||
#define BWN_BARRIER(mac, flags) siba_barrier(mac->mac_sc->sc_dev, flags) | #define BWN_BARRIER(mac, offset, length, flags) \ | ||||
bus_barrier((mac)->mac_sc->sc_mem_res, (offset), (length), (flags)) | |||||
#define BWN_DMA_READ(dr, offset) \ | #define BWN_DMA_READ(dr, offset) \ | ||||
(BWN_READ_4(dr->dr_mac, dr->dr_base + offset)) | (BWN_READ_4(dr->dr_mac, dr->dr_base + offset)) | ||||
#define BWN_DMA_WRITE(dr, offset, value) \ | #define BWN_DMA_WRITE(dr, offset, value) \ | ||||
(BWN_WRITE_4(dr->dr_mac, dr->dr_base + offset, value)) | (BWN_WRITE_4(dr->dr_mac, dr->dr_base + offset, value)) | ||||
typedef enum { | typedef enum { | ||||
BWN_PHY_BAND_2G = 0, | BWN_PHY_BAND_2G = 0, | ||||
▲ Show 20 Lines • Show All 173 Lines • ▼ Show 20 Lines | #define BWN_PHY_G_FLAG_RADIOCTX_VALID (1 << 1) | ||||
int pg_aci_enable; | int pg_aci_enable; | ||||
int pg_aci_wlan_automatic; | int pg_aci_wlan_automatic; | ||||
int pg_aci_hw_rssi; | int pg_aci_hw_rssi; | ||||
int pg_rf_on; | int pg_rf_on; | ||||
uint16_t pg_radioctx_over; | uint16_t pg_radioctx_over; | ||||
uint16_t pg_radioctx_overval; | uint16_t pg_radioctx_overval; | ||||
uint16_t pg_minlowsig[2]; | uint16_t pg_minlowsig[2]; | ||||
uint16_t pg_minlowsigpos[2]; | uint16_t pg_minlowsigpos[2]; | ||||
uint16_t pg_pa0maxpwr; | |||||
int8_t *pg_tssi2dbm; | int8_t *pg_tssi2dbm; | ||||
int pg_idletssi; | int pg_idletssi; | ||||
int pg_curtssi; | int pg_curtssi; | ||||
uint8_t pg_avgtssi; | uint8_t pg_avgtssi; | ||||
struct bwn_bbatt pg_bbatt; | struct bwn_bbatt pg_bbatt; | ||||
struct bwn_rfatt pg_rfatt; | struct bwn_rfatt pg_rfatt; | ||||
uint8_t pg_txctl; | uint8_t pg_txctl; | ||||
int pg_bbatt_delta; | int pg_bbatt_delta; | ||||
▲ Show 20 Lines • Show All 241 Lines • ▼ Show 20 Lines | |||||
/* Noise Calculation (Link Quality) */ | /* Noise Calculation (Link Quality) */ | ||||
struct bwn_noise { | struct bwn_noise { | ||||
uint8_t noi_running; | uint8_t noi_running; | ||||
uint8_t noi_nsamples; | uint8_t noi_nsamples; | ||||
int8_t noi_samples[8][4]; | int8_t noi_samples[8][4]; | ||||
}; | }; | ||||
#define BWN_DMA_30BIT 30 | |||||
#define BWN_DMA_32BIT 32 | |||||
#define BWN_DMA_64BIT 64 | |||||
struct bwn_dmadesc_meta { | struct bwn_dmadesc_meta { | ||||
bus_dmamap_t mt_dmap; | bus_dmamap_t mt_dmap; | ||||
bus_addr_t mt_paddr; | bus_addr_t mt_paddr; | ||||
struct mbuf *mt_m; | struct mbuf *mt_m; | ||||
struct ieee80211_node *mt_ni; | struct ieee80211_node *mt_ni; | ||||
uint8_t mt_txtype; | uint8_t mt_txtype; | ||||
#define BWN_DMADESC_METATYPE_HEADER 0 | #define BWN_DMADESC_METATYPE_HEADER 0 | ||||
#define BWN_DMADESC_METATYPE_BODY 1 | #define BWN_DMADESC_METATYPE_BODY 1 | ||||
▲ Show 20 Lines • Show All 75 Lines • ▼ Show 20 Lines | struct bwn_dma_ring { | ||||
void (*suspend)(struct bwn_dma_ring *); | void (*suspend)(struct bwn_dma_ring *); | ||||
void (*resume)(struct bwn_dma_ring *); | void (*resume)(struct bwn_dma_ring *); | ||||
int (*get_curslot)(struct bwn_dma_ring *); | int (*get_curslot)(struct bwn_dma_ring *); | ||||
void (*set_curslot)(struct bwn_dma_ring *, | void (*set_curslot)(struct bwn_dma_ring *, | ||||
int); | int); | ||||
}; | }; | ||||
struct bwn_dma { | struct bwn_dma { | ||||
int dmatype; | |||||
bus_dma_tag_t parent_dtag; | bus_dma_tag_t parent_dtag; | ||||
bus_dma_tag_t rxbuf_dtag; | bus_dma_tag_t rxbuf_dtag; | ||||
bus_dma_tag_t txbuf_dtag; | bus_dma_tag_t txbuf_dtag; | ||||
struct bhnd_dma_translation translation; | |||||
u_int addrext_shift; | |||||
struct bwn_dma_ring *wme[5]; | struct bwn_dma_ring *wme[5]; | ||||
struct bwn_dma_ring *mcast; | struct bwn_dma_ring *mcast; | ||||
struct bwn_dma_ring *rx; | struct bwn_dma_ring *rx; | ||||
uint64_t lastseq; /* XXX FIXME */ | uint64_t lastseq; /* XXX FIXME */ | ||||
}; | }; | ||||
struct bwn_pio_rxqueue { | struct bwn_pio_rxqueue { | ||||
▲ Show 20 Lines • Show All 227 Lines • ▼ Show 20 Lines | #define BWN_MAC_STATUS_STARTED 2 | ||||
/* use "Bad Frames Preemption" */ | /* use "Bad Frames Preemption" */ | ||||
#define BWN_MAC_FLAG_BADFRAME_PREEMP (1 << 0) | #define BWN_MAC_FLAG_BADFRAME_PREEMP (1 << 0) | ||||
#define BWN_MAC_FLAG_DFQVALID (1 << 1) | #define BWN_MAC_FLAG_DFQVALID (1 << 1) | ||||
#define BWN_MAC_FLAG_RADIO_ON (1 << 2) | #define BWN_MAC_FLAG_RADIO_ON (1 << 2) | ||||
#define BWN_MAC_FLAG_DMA (1 << 3) | #define BWN_MAC_FLAG_DMA (1 << 3) | ||||
#define BWN_MAC_FLAG_WME (1 << 4) | #define BWN_MAC_FLAG_WME (1 << 4) | ||||
#define BWN_MAC_FLAG_HWCRYPTO (1 << 5) | #define BWN_MAC_FLAG_HWCRYPTO (1 << 5) | ||||
struct resource_spec *mac_intr_spec; | struct resource *mac_res_irq; | ||||
#define BWN_MSI_MESSAGES 1 | int mac_rid_irq; | ||||
struct resource *mac_res_irq[BWN_MSI_MESSAGES]; | void *mac_intrhand; | ||||
void *mac_intrhand[BWN_MSI_MESSAGES]; | |||||
int mac_msi; | |||||
struct bwn_noise mac_noise; | struct bwn_noise mac_noise; | ||||
struct bwn_phy mac_phy; | struct bwn_phy mac_phy; | ||||
struct bwn_stats mac_stats; | struct bwn_stats mac_stats; | ||||
uint32_t mac_reason_intr; | uint32_t mac_reason_intr; | ||||
uint32_t mac_reason[6]; | uint32_t mac_reason[6]; | ||||
uint32_t mac_intr_mask; | uint32_t mac_intr_mask; | ||||
int mac_suspended; | int mac_suspended; | ||||
struct bwn_fw mac_fw; | struct bwn_fw mac_fw; | ||||
int mac_dmatype; | |||||
union { | union { | ||||
struct bwn_dma dma; | struct bwn_dma dma; | ||||
struct bwn_pio pio; | struct bwn_pio pio; | ||||
} mac_method; | } mac_method; | ||||
uint16_t mac_ktp; /* Key table pointer */ | uint16_t mac_ktp; /* Key table pointer */ | ||||
uint8_t mac_max_nr_keys; | uint8_t mac_max_nr_keys; | ||||
struct bwn_key mac_key[58]; | struct bwn_key mac_key[58]; | ||||
Show All 29 Lines | |||||
struct bwn_vap { | struct bwn_vap { | ||||
struct ieee80211vap bv_vap; /* base class */ | struct ieee80211vap bv_vap; /* base class */ | ||||
int (*bv_newstate)(struct ieee80211vap *, | int (*bv_newstate)(struct ieee80211vap *, | ||||
enum ieee80211_state, int); | enum ieee80211_state, int); | ||||
}; | }; | ||||
#define BWN_VAP(vap) ((struct bwn_vap *)(vap)) | #define BWN_VAP(vap) ((struct bwn_vap *)(vap)) | ||||
#define BWN_VAP_CONST(vap) ((const struct mwl_vap *)(vap)) | #define BWN_VAP_CONST(vap) ((const struct mwl_vap *)(vap)) | ||||
enum bwn_quirk { | |||||
/** | |||||
* The ucode PCI slowclock workaround is required on this device. | |||||
* @see BWN_HF_PCI_SLOWCLOCK_WORKAROUND. | |||||
*/ | |||||
BWN_QUIRK_UCODE_SLOWCLOCK_WAR = (1<<0), | |||||
/** | |||||
* DMA is unsupported on this device; PIO should be used instead. | |||||
*/ | |||||
BWN_QUIRK_NODMA = (1<<1), | |||||
}; | |||||
struct bwn_softc { | struct bwn_softc { | ||||
device_t sc_dev; | device_t sc_dev; | ||||
const struct bwn_bus_ops *sc_bus_ops; | struct bhnd_board_info sc_board_info; | ||||
#if !BWN_USE_SIBA | struct bhnd_chipid sc_cid; | ||||
void *sc_bus_ctx; | uint32_t sc_quirks; /**< @see bwn_quirk */ | ||||
struct bhnd_resource *sc_mem_res; | struct resource *sc_mem_res; | ||||
int sc_mem_rid; | int sc_mem_rid; | ||||
#endif /* !BWN_USE_SIBA */ | |||||
device_t sc_chipc; /**< ChipCommon device */ | |||||
device_t sc_gpio; /**< GPIO device */ | |||||
device_t sc_pmu; /**< PMU device, or NULL if unsupported */ | |||||
struct mtx sc_mtx; | struct mtx sc_mtx; | ||||
struct ieee80211com sc_ic; | struct ieee80211com sc_ic; | ||||
struct mbufq sc_snd; | struct mbufq sc_snd; | ||||
unsigned sc_flags; | unsigned sc_flags; | ||||
#define BWN_FLAG_ATTACHED (1 << 0) | #define BWN_FLAG_ATTACHED (1 << 0) | ||||
#define BWN_FLAG_INVALID (1 << 1) | #define BWN_FLAG_INVALID (1 << 1) | ||||
#define BWN_FLAG_NEED_BEACON_TP (1 << 2) | #define BWN_FLAG_NEED_BEACON_TP (1 << 2) | ||||
#define BWN_FLAG_RUNNING (1 << 3) | #define BWN_FLAG_RUNNING (1 << 3) | ||||
Show All 25 Lines | #define BWN_FLAG_RUNNING (1 << 3) | ||||
int sc_led_blinking; | int sc_led_blinking; | ||||
int sc_led_ticks; | int sc_led_ticks; | ||||
struct bwn_led *sc_blink_led; | struct bwn_led *sc_blink_led; | ||||
struct callout sc_led_blink_ch; | struct callout sc_led_blink_ch; | ||||
int sc_led_blink_offdur; | int sc_led_blink_offdur; | ||||
struct bwn_led sc_leds[BWN_LED_MAX]; | struct bwn_led sc_leds[BWN_LED_MAX]; | ||||
int sc_led_idle; | int sc_led_idle; | ||||
int sc_led_blink; | int sc_led_blink; | ||||
uint8_t sc_ant2g; /**< available 2GHz antennas */ | |||||
uint8_t sc_ant5g; /**< available 5GHz antennas */ | |||||
struct bwn_tx_radiotap_header sc_tx_th; | struct bwn_tx_radiotap_header sc_tx_th; | ||||
struct bwn_rx_radiotap_header sc_rx_th; | struct bwn_rx_radiotap_header sc_rx_th; | ||||
}; | }; | ||||
#define BWN_LOCK_INIT(sc) \ | #define BWN_LOCK_INIT(sc) \ | ||||
mtx_init(&(sc)->sc_mtx, device_get_nameunit((sc)->sc_dev), \ | mtx_init(&(sc)->sc_mtx, device_get_nameunit((sc)->sc_dev), \ | ||||
MTX_NETWORK_LOCK, MTX_DEF) | MTX_NETWORK_LOCK, MTX_DEF) | ||||
▲ Show 20 Lines • Show All 99 Lines • Show Last 20 Lines |