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sys/dev/bwn/if_bwn_phy_common.c
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#include <dev/pci/pcireg.h> | #include <dev/pci/pcireg.h> | ||||
#include <net80211/ieee80211_var.h> | #include <net80211/ieee80211_var.h> | ||||
#include <net80211/ieee80211_radiotap.h> | #include <net80211/ieee80211_radiotap.h> | ||||
#include <net80211/ieee80211_regdomain.h> | #include <net80211/ieee80211_regdomain.h> | ||||
#include <net80211/ieee80211_phy.h> | #include <net80211/ieee80211_phy.h> | ||||
#include <net80211/ieee80211_ratectl.h> | #include <net80211/ieee80211_ratectl.h> | ||||
#include <dev/bwn/if_bwn_siba.h> | #include <dev/bhnd/bhnd.h> | ||||
#include <dev/bhnd/bhnd_ids.h> | |||||
#include <dev/bhnd/cores/chipc/chipc.h> | |||||
#include <dev/bhnd/cores/pmu/bhnd_pmu.h> | |||||
#include <dev/bwn/if_bwnreg.h> | #include <dev/bwn/if_bwnreg.h> | ||||
#include <dev/bwn/if_bwnvar.h> | #include <dev/bwn/if_bwnvar.h> | ||||
#include <dev/bwn/if_bwn_chipid.h> | |||||
#include <dev/bwn/if_bwn_debug.h> | #include <dev/bwn/if_bwn_debug.h> | ||||
#include <dev/bwn/if_bwn_misc.h> | #include <dev/bwn/if_bwn_misc.h> | ||||
#include <dev/bwn/if_bwn_phy_common.h> | #include <dev/bwn/if_bwn_phy_common.h> | ||||
void | void | ||||
bwn_mac_switch_freq(struct bwn_mac *mac, int spurmode) | bwn_mac_switch_freq(struct bwn_mac *mac, bhnd_pmu_spuravoid spurmode) | ||||
{ | { | ||||
struct bwn_softc *sc = mac->mac_sc; | struct bwn_softc *sc = mac->mac_sc; | ||||
uint16_t chip_id = siba_get_chipid(sc->sc_dev); | uint16_t chip_id = sc->sc_cid.chip_id; | ||||
if (chip_id == BCMA_CHIP_ID_BCM4331) { | if (chip_id == BHND_CHIPID_BCM4331) { | ||||
switch (spurmode) { | switch (spurmode) { | ||||
case 2: /* 168 Mhz: 2^26/168 = 0x61862 */ | case BHND_PMU_SPURAVOID_M2: /* 168 Mhz: 2^26/168 = 0x61862 */ | ||||
BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_LOW, 0x1862); | BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_LOW, 0x1862); | ||||
BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_HIGH, 0x6); | BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_HIGH, 0x6); | ||||
break; | break; | ||||
case 1: /* 164 Mhz: 2^26/164 = 0x63e70 */ | case BHND_PMU_SPURAVOID_M1: /* 164 Mhz: 2^26/164 = 0x63e70 */ | ||||
BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_LOW, 0x3e70); | BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_LOW, 0x3e70); | ||||
BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_HIGH, 0x6); | BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_HIGH, 0x6); | ||||
break; | break; | ||||
default: /* 160 Mhz: 2^26/160 = 0x66666 */ | case BHND_PMU_SPURAVOID_NONE: /* 160 Mhz: 2^26/160 = 0x66666 */ | ||||
BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_LOW, 0x6666); | BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_LOW, 0x6666); | ||||
BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_HIGH, 0x6); | BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_HIGH, 0x6); | ||||
break; | break; | ||||
} | } | ||||
} else if (chip_id == BCMA_CHIP_ID_BCM43131 || | } else if (chip_id == BHND_CHIPID_BCM43131 || | ||||
chip_id == BCMA_CHIP_ID_BCM43217 || | chip_id == BHND_CHIPID_BCM43217 || | ||||
chip_id == BCMA_CHIP_ID_BCM43222 || | chip_id == BHND_CHIPID_BCM43222 || | ||||
chip_id == BCMA_CHIP_ID_BCM43224 || | chip_id == BHND_CHIPID_BCM43224 || | ||||
chip_id == BCMA_CHIP_ID_BCM43225 || | chip_id == BHND_CHIPID_BCM43225 || | ||||
chip_id == BCMA_CHIP_ID_BCM43227 || | chip_id == BHND_CHIPID_BCM43227 || | ||||
chip_id == BCMA_CHIP_ID_BCM43228) { | chip_id == BHND_CHIPID_BCM43228) { | ||||
switch (spurmode) { | switch (spurmode) { | ||||
case 2: /* 126 Mhz */ | case BHND_PMU_SPURAVOID_M2: /* 126 Mhz */ | ||||
BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_LOW, 0x2082); | BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_LOW, 0x2082); | ||||
BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_HIGH, 0x8); | BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_HIGH, 0x8); | ||||
break; | break; | ||||
case 1: /* 123 Mhz */ | case BHND_PMU_SPURAVOID_M1: /* 123 Mhz */ | ||||
BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_LOW, 0x5341); | BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_LOW, 0x5341); | ||||
BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_HIGH, 0x8); | BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_HIGH, 0x8); | ||||
break; | break; | ||||
default: /* 120 Mhz */ | case BHND_PMU_SPURAVOID_NONE: /* 120 Mhz */ | ||||
BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_LOW, 0x8889); | BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_LOW, 0x8889); | ||||
BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_HIGH, 0x8); | BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_HIGH, 0x8); | ||||
break; | break; | ||||
} | } | ||||
} else if (mac->mac_phy.type == BWN_PHYTYPE_LCN) { | } else if (mac->mac_phy.type == BWN_PHYTYPE_LCN) { | ||||
switch (spurmode) { | switch (spurmode) { | ||||
case 1: /* 82 Mhz */ | case BHND_PMU_SPURAVOID_M2: | ||||
device_printf(sc->sc_dev, "invalid spuravoid mode: " | |||||
"%d\n", spurmode); | |||||
break; | |||||
case BHND_PMU_SPURAVOID_M1: /* 82 Mhz */ | |||||
BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_LOW, 0x7CE0); | BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_LOW, 0x7CE0); | ||||
BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_HIGH, 0xC); | BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_HIGH, 0xC); | ||||
break; | break; | ||||
default: /* 80 Mhz */ | case BHND_PMU_SPURAVOID_NONE: /* 80 Mhz */ | ||||
BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_LOW, 0xCCCD); | BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_LOW, 0xCCCD); | ||||
BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_HIGH, 0xC); | BWN_WRITE_2(mac, BWN_TSF_CLK_FRAC_HIGH, 0xC); | ||||
break; | break; | ||||
} | } | ||||
} | } | ||||
} | } | ||||
/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/BmacPhyClkFgc */ | /* http://bcm-v4.sipsolutions.net/802.11/PHY/N/BmacPhyClkFgc */ | ||||
void | int | ||||
bwn_phy_force_clock(struct bwn_mac *mac, int force) | bwn_phy_force_clock(struct bwn_mac *mac, int force) | ||||
{ | { | ||||
struct bwn_softc *sc = mac->mac_sc; | struct bwn_softc *sc; | ||||
uint32_t tmp; | uint32_t val, mask; | ||||
int error; | |||||
sc = mac->mac_sc; | |||||
/* XXX Only for N, HT and AC PHYs */ | /* XXX Only for N, HT and AC PHYs */ | ||||
mask = BHND_IOCTL_CLK_FORCE; | |||||
if (force) { | |||||
val = BHND_IOCTL_CLK_FORCE; | |||||
} else { | |||||
val = 0; | |||||
} | |||||
tmp = siba_read_4(sc->sc_dev, SIBA_TGSLOW); | if ((error = bhnd_write_ioctl(sc->sc_dev, val, mask))) { | ||||
if (force) | device_printf(sc->sc_dev, "failed to set CLK_FORCE ioctl flag: " | ||||
tmp |= SIBA_TGSLOW_FGC; | "%d\n", error); | ||||
else | return (error); | ||||
tmp &= ~SIBA_TGSLOW_FGC; | |||||
siba_write_4(sc->sc_dev, SIBA_TGSLOW, tmp); | |||||
} | } | ||||
return (0); | |||||
} | |||||
int | int | ||||
bwn_radio_wait_value(struct bwn_mac *mac, uint16_t offset, uint16_t mask, | bwn_radio_wait_value(struct bwn_mac *mac, uint16_t offset, uint16_t mask, | ||||
uint16_t value, int delay, int timeout) | uint16_t value, int delay, int timeout) | ||||
{ | { | ||||
uint16_t val; | uint16_t val; | ||||
int i; | int i; | ||||
for (i = 0; i < timeout; i += delay) { | for (i = 0; i < timeout; i += delay) { | ||||
val = BWN_RF_READ(mac, offset); | val = BWN_RF_READ(mac, offset); | ||||
if ((val & mask) == value) | if ((val & mask) == value) | ||||
return (1); | return (1); | ||||
DELAY(delay); | DELAY(delay); | ||||
} | } | ||||
return (0); | return (0); | ||||
} | } | ||||
void | int | ||||
bwn_mac_phy_clock_set(struct bwn_mac *mac, int enabled) | bwn_mac_phy_clock_set(struct bwn_mac *mac, int enabled) | ||||
{ | { | ||||
struct bwn_softc *sc = mac->mac_sc; | struct bwn_softc *sc; | ||||
uint32_t val; | uint32_t val, mask; | ||||
int error; | |||||
val = siba_read_4(sc->sc_dev, SIBA_TGSLOW); | sc = mac->mac_sc; | ||||
if (enabled) | |||||
val |= BWN_TGSLOW_MACPHYCLKEN; | mask = BWN_IOCTL_MACPHYCLKEN; | ||||
else | if (enabled) { | ||||
val &= ~BWN_TGSLOW_MACPHYCLKEN; | val = BWN_IOCTL_MACPHYCLKEN; | ||||
siba_write_4(sc->sc_dev, SIBA_TGSLOW, val); | } else { | ||||
val = 0; | |||||
} | } | ||||
if ((error = bhnd_write_ioctl(sc->sc_dev, val, mask))) { | |||||
device_printf(sc->sc_dev, "failed to set MACPHYCLKEN ioctl " | |||||
"flag: %d\n", error); | |||||
return (error); | |||||
} | |||||
return (0); | |||||
} | |||||
/* http://bcm-v4.sipsolutions.net/802.11/PHY/BmacCorePllReset */ | /* http://bcm-v4.sipsolutions.net/802.11/PHY/BmacCorePllReset */ | ||||
void | int | ||||
bwn_wireless_core_phy_pll_reset(struct bwn_mac *mac) | bwn_wireless_core_phy_pll_reset(struct bwn_mac *mac) | ||||
{ | { | ||||
struct bwn_softc *sc = mac->mac_sc; | struct bwn_softc *sc; | ||||
uint32_t pll_flag; | |||||
siba_cc_write32(sc->sc_dev, SIBA_CC_CHIPCTL_ADDR, 0); | sc = mac->mac_sc; | ||||
siba_cc_mask32(sc->sc_dev, SIBA_CC_CHIPCTL_DATA, ~0x4); | |||||
siba_cc_set32(sc->sc_dev, SIBA_CC_CHIPCTL_DATA, 0x4); | if (sc->sc_pmu == NULL) { | ||||
siba_cc_mask32(sc->sc_dev, SIBA_CC_CHIPCTL_DATA, ~0x4); | device_printf(sc->sc_dev, "PMU device not found\n"); | ||||
return (ENXIO); | |||||
} | |||||
pll_flag = 0x4; | |||||
bhnd_pmu_write_chipctrl(sc->sc_pmu, 0x0, 0x0, pll_flag); | |||||
bhnd_pmu_write_chipctrl(sc->sc_pmu, 0x0, pll_flag, pll_flag); | |||||
bhnd_pmu_write_chipctrl(sc->sc_pmu, 0x0, 0x0, pll_flag); | |||||
return (0); | |||||
} | } |