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head/sys/amd64/include/pcpu.h
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#define PCPU_MD_FIELDS \ | #define PCPU_MD_FIELDS \ | ||||
char pc_monitorbuf[128] __aligned(128); /* cache line */ \ | char pc_monitorbuf[128] __aligned(128); /* cache line */ \ | ||||
struct pcpu *pc_prvspace; /* Self-reference */ \ | struct pcpu *pc_prvspace; /* Self-reference */ \ | ||||
struct pmap *pc_curpmap; \ | struct pmap *pc_curpmap; \ | ||||
struct amd64tss *pc_tssp; /* TSS segment active on CPU */ \ | struct amd64tss *pc_tssp; /* TSS segment active on CPU */ \ | ||||
struct amd64tss *pc_commontssp;/* Common TSS for the CPU */ \ | struct amd64tss *pc_commontssp;/* Common TSS for the CPU */ \ | ||||
uint64_t pc_kcr3; \ | uint64_t pc_kcr3; \ | ||||
uint64_t pc_ucr3; \ | uint64_t pc_ucr3; \ | ||||
uint64_t pc_saved_ucr3; \ | |||||
register_t pc_rsp0; \ | register_t pc_rsp0; \ | ||||
register_t pc_scratch_rsp; /* User %rsp in syscall */ \ | register_t pc_scratch_rsp; /* User %rsp in syscall */ \ | ||||
register_t pc_scratch_rax; \ | register_t pc_scratch_rax; \ | ||||
u_int pc_apic_id; \ | u_int pc_apic_id; \ | ||||
u_int pc_acpi_id; /* ACPI CPU id */ \ | u_int pc_acpi_id; /* ACPI CPU id */ \ | ||||
/* Pointer to the CPU %fs descriptor */ \ | /* Pointer to the CPU %fs descriptor */ \ | ||||
struct user_segment_descriptor *pc_fs32p; \ | struct user_segment_descriptor *pc_fs32p; \ | ||||
/* Pointer to the CPU %gs descriptor */ \ | /* Pointer to the CPU %gs descriptor */ \ | ||||
struct user_segment_descriptor *pc_gs32p; \ | struct user_segment_descriptor *pc_gs32p; \ | ||||
/* Pointer to the CPU LDT descriptor */ \ | /* Pointer to the CPU LDT descriptor */ \ | ||||
struct system_segment_descriptor *pc_ldt; \ | struct system_segment_descriptor *pc_ldt; \ | ||||
/* Pointer to the CPU TSS descriptor */ \ | /* Pointer to the CPU TSS descriptor */ \ | ||||
struct system_segment_descriptor *pc_tss; \ | struct system_segment_descriptor *pc_tss; \ | ||||
uint64_t pc_pm_save_cnt; \ | uint64_t pc_pm_save_cnt; \ | ||||
u_int pc_cmci_mask; /* MCx banks for CMCI */ \ | u_int pc_cmci_mask; /* MCx banks for CMCI */ \ | ||||
uint64_t pc_dbreg[16]; /* ddb debugging regs */ \ | uint64_t pc_dbreg[16]; /* ddb debugging regs */ \ | ||||
uint64_t pc_pti_stack[PC_PTI_STACK_SZ]; \ | uint64_t pc_pti_stack[PC_PTI_STACK_SZ]; \ | ||||
int pc_dbreg_cmd; /* ddb debugging reg cmd */ \ | int pc_dbreg_cmd; /* ddb debugging reg cmd */ \ | ||||
u_int pc_vcpu_id; /* Xen vCPU ID */ \ | u_int pc_vcpu_id; /* Xen vCPU ID */ \ | ||||
uint32_t pc_pcid_next; \ | uint32_t pc_pcid_next; \ | ||||
uint32_t pc_pcid_gen; \ | uint32_t pc_pcid_gen; \ | ||||
uint32_t pc_smp_tlb_done; /* TLB op acknowledgement */ \ | uint32_t pc_smp_tlb_done; /* TLB op acknowledgement */ \ | ||||
char __pad[232] /* be divisor of PAGE_SIZE \ | char __pad[224] /* be divisor of PAGE_SIZE \ | ||||
after cache alignment */ | after cache alignment */ | ||||
#define PC_DBREG_CMD_NONE 0 | #define PC_DBREG_CMD_NONE 0 | ||||
#define PC_DBREG_CMD_LOAD 1 | #define PC_DBREG_CMD_LOAD 1 | ||||
#ifdef _KERNEL | #ifdef _KERNEL | ||||
#if defined(__GNUCLIKE_ASM) && defined(__GNUCLIKE___TYPEOF) | #if defined(__GNUCLIKE_ASM) && defined(__GNUCLIKE___TYPEOF) | ||||
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