Differential D13962 Diff 38190 head/sys/amd64/amd64/machdep.c

Changeset View

Standalone View

head/sys/amd64/amd64/machdep.c

Show First 20 Lines • Show All 656 Lines • ▼ Show 20 Lines
* Initialize segments & interrupt table		* Initialize segments & interrupt table
*/		*/

struct user_segment_descriptor gdt[NGDT * MAXCPU];/* global descriptor tables */		struct user_segment_descriptor gdt[NGDT * MAXCPU];/* global descriptor tables */
static struct gate_descriptor idt0[NIDT];		static struct gate_descriptor idt0[NIDT];
struct gate_descriptor idt = &idt0[0]; / interrupt descriptor table */		struct gate_descriptor idt = &idt0[0]; / interrupt descriptor table */

static char dblfault_stack[PAGE_SIZE] __aligned(16);		static char dblfault_stack[PAGE_SIZE] __aligned(16);
		static char mce0_stack[PAGE_SIZE] __aligned(16);
static char nmi0_stack[PAGE_SIZE] __aligned(16);		static char nmi0_stack[PAGE_SIZE] __aligned(16);
CTASSERT(sizeof(struct nmi_pcpu) == 16);		CTASSERT(sizeof(struct nmi_pcpu) == 16);

struct amd64tss common_tss[MAXCPU];		struct amd64tss common_tss[MAXCPU];

/*		/*
* Software prototypes -- in more palatable form.		* Software prototypes -- in more palatable form.
*		*
▲ Show 20 Lines • Show All 140 Lines • ▼ Show 20 Lines	extern inthand_t
IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),		IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),		IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),		IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),		IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
IDTVEC(xmm), IDTVEC(dblfault),		IDTVEC(xmm), IDTVEC(dblfault),
IDTVEC(div_pti), IDTVEC(dbg_pti), IDTVEC(bpt_pti),		IDTVEC(div_pti), IDTVEC(dbg_pti), IDTVEC(bpt_pti),
IDTVEC(ofl_pti), IDTVEC(bnd_pti), IDTVEC(ill_pti), IDTVEC(dna_pti),		IDTVEC(ofl_pti), IDTVEC(bnd_pti), IDTVEC(ill_pti), IDTVEC(dna_pti),
IDTVEC(fpusegm_pti), IDTVEC(tss_pti), IDTVEC(missing_pti),		IDTVEC(fpusegm_pti), IDTVEC(tss_pti), IDTVEC(missing_pti),
IDTVEC(stk_pti), IDTVEC(prot_pti), IDTVEC(page_pti), IDTVEC(mchk_pti),		IDTVEC(stk_pti), IDTVEC(prot_pti), IDTVEC(page_pti),
IDTVEC(rsvd_pti), IDTVEC(fpu_pti), IDTVEC(align_pti),		IDTVEC(rsvd_pti), IDTVEC(fpu_pti), IDTVEC(align_pti),
IDTVEC(xmm_pti),		IDTVEC(xmm_pti),
#ifdef KDTRACE_HOOKS		#ifdef KDTRACE_HOOKS
IDTVEC(dtrace_ret), IDTVEC(dtrace_ret_pti),		IDTVEC(dtrace_ret), IDTVEC(dtrace_ret_pti),
#endif		#endif
#ifdef XENHVM		#ifdef XENHVM
IDTVEC(xen_intr_upcall), IDTVEC(xen_intr_upcall_pti),		IDTVEC(xen_intr_upcall), IDTVEC(xen_intr_upcall_pti),
#endif		#endif
▲ Show 20 Lines • Show All 822 Lines • ▼ Show 20 Lines	hammer_time(u_int64_t modulep, u_int64_t physfree)
setidt(IDT_GP, pti ? &IDTVEC(prot_pti) : &IDTVEC(prot), SDT_SYSIGT,		setidt(IDT_GP, pti ? &IDTVEC(prot_pti) : &IDTVEC(prot), SDT_SYSIGT,
SEL_KPL, 0);		SEL_KPL, 0);
setidt(IDT_PF, pti ? &IDTVEC(page_pti) : &IDTVEC(page), SDT_SYSIGT,		setidt(IDT_PF, pti ? &IDTVEC(page_pti) : &IDTVEC(page), SDT_SYSIGT,
SEL_KPL, 0);		SEL_KPL, 0);
setidt(IDT_MF, pti ? &IDTVEC(fpu_pti) : &IDTVEC(fpu), SDT_SYSIGT,		setidt(IDT_MF, pti ? &IDTVEC(fpu_pti) : &IDTVEC(fpu), SDT_SYSIGT,
SEL_KPL, 0);		SEL_KPL, 0);
setidt(IDT_AC, pti ? &IDTVEC(align_pti) : &IDTVEC(align), SDT_SYSIGT,		setidt(IDT_AC, pti ? &IDTVEC(align_pti) : &IDTVEC(align), SDT_SYSIGT,
SEL_KPL, 0);		SEL_KPL, 0);
setidt(IDT_MC, pti ? &IDTVEC(mchk_pti) : &IDTVEC(mchk), SDT_SYSIGT,		setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 3);
SEL_KPL, 0);
setidt(IDT_XF, pti ? &IDTVEC(xmm_pti) : &IDTVEC(xmm), SDT_SYSIGT,		setidt(IDT_XF, pti ? &IDTVEC(xmm_pti) : &IDTVEC(xmm), SDT_SYSIGT,
SEL_KPL, 0);		SEL_KPL, 0);
#ifdef KDTRACE_HOOKS		#ifdef KDTRACE_HOOKS
setidt(IDT_DTRACE_RET, pti ? &IDTVEC(dtrace_ret_pti) :		setidt(IDT_DTRACE_RET, pti ? &IDTVEC(dtrace_ret_pti) :
&IDTVEC(dtrace_ret), SDT_SYSIGT, SEL_UPL, 0);		&IDTVEC(dtrace_ret), SDT_SYSIGT, SEL_UPL, 0);
#endif		#endif
#ifdef XENHVM		#ifdef XENHVM
setidt(IDT_EVTCHN, &IDTVEC(xen_intr_upcall), SDT_SYSIGT, SEL_UPL, 0);		setidt(IDT_EVTCHN, &IDTVEC(xen_intr_upcall), SDT_SYSIGT, SEL_UPL, 0);
Show All 27 Lines	#endif

/*		/*
* NMI stack, runs on ist2. The pcpu pointer is stored just		* NMI stack, runs on ist2. The pcpu pointer is stored just
* above the start of the ist2 stack.		* above the start of the ist2 stack.
*/		*/
np = ((struct nmi_pcpu *) &nmi0_stack[sizeof(nmi0_stack)]) - 1;		np = ((struct nmi_pcpu *) &nmi0_stack[sizeof(nmi0_stack)]) - 1;
np->np_pcpu = (register_t) pc;		np->np_pcpu = (register_t) pc;
common_tss[0].tss_ist2 = (long) np;		common_tss[0].tss_ist2 = (long) np;

		/*
		* MC# stack, runs on ist3. The pcpu pointer is stored just
		* above the start of the ist3 stack.
		*/
		np = ((struct nmi_pcpu *) &mce0_stack[sizeof(mce0_stack)]) - 1;
		np->np_pcpu = (register_t) pc;
		common_tss[0].tss_ist3 = (long) np;

/* Set the IO permission bitmap (empty due to tss seg limit) */		/* Set the IO permission bitmap (empty due to tss seg limit) */
common_tss[0].tss_iobase = sizeof(struct amd64tss) + IOPERM_BITMAP_SIZE;		common_tss[0].tss_iobase = sizeof(struct amd64tss) + IOPERM_BITMAP_SIZE;

gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);		gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
ltr(gsel_tss);		ltr(gsel_tss);

amd64_conf_fast_syscall();		amd64_conf_fast_syscall();

▲ Show 20 Lines • Show All 898 Lines • Show Last 20 Lines