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Show First 20 Lines • Show All 4,657 Lines • ▼ Show 20 Lines	__asm __volatile("msr ttbr0_el1, %0" : :
"r"(td->td_proc->p_md.md_l0addr));		"r"(td->td_proc->p_md.md_l0addr));
pmap_invalidate_all(pmap);		pmap_invalidate_all(pmap);
critical_exit();		critical_exit();
}		}

struct pcb *		struct pcb *
pmap_switch(struct thread old, struct thread new)		pmap_switch(struct thread old, struct thread new)
{		{
		pcpu_bp_harden bp_harden;
struct pcb *pcb;		struct pcb *pcb;

/* Store the new curthread */		/* Store the new curthread */
PCPU_SET(curthread, new);		PCPU_SET(curthread, new);

/* And the new pcb */		/* And the new pcb */
pcb = new->td_pcb;		pcb = new->td_pcb;
PCPU_SET(curpcb, pcb);		PCPU_SET(curpcb, pcb);
Show All 11 Lines	__asm __volatile(
"isb \n"		"isb \n"

/* Invalidate the TLB */		/* Invalidate the TLB */
"dsb ishst \n"		"dsb ishst \n"
"tlbi vmalle1is \n"		"tlbi vmalle1is \n"
"dsb ish \n"		"dsb ish \n"
"isb \n"		"isb \n"
: : "r"(new->td_proc->p_md.md_l0addr));		: : "r"(new->td_proc->p_md.md_l0addr));

		/*
		* Stop userspace from training the branch predictor against
		* other processes. This will call into a CPU specific
		* function that clears the branch predictor state.
		*/
		bp_harden = PCPU_GET(bp_harden);
		if (bp_harden != NULL)
		bp_harden();
}		}

return (pcb);		return (pcb);
}		}

void		void
pmap_sync_icache(pmap_t pmap, vm_offset_t va, vm_size_t sz)		pmap_sync_icache(pmap_t pmap, vm_offset_t va, vm_size_t sz)
{		{
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