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	#ifndef _MACHINE_PCPU_H_			#ifndef _MACHINE_PCPU_H_
	#define _MACHINE_PCPU_H_			#define _MACHINE_PCPU_H_

	#include <machine/cpu.h>			#include <machine/cpu.h>
	#include <machine/cpufunc.h>			#include <machine/cpufunc.h>

	#define ALT_STACK_SIZE 128			#define ALT_STACK_SIZE 128

				typedef int (*pcpu_bp_harden)(void);

	#define PCPU_MD_FIELDS \			#define PCPU_MD_FIELDS \
	u_int pc_acpi_id; /* ACPI CPU id */ \			u_int pc_acpi_id; /* ACPI CPU id */ \
	u_int pc_midr; /* stored MIDR value */ \			u_int pc_midr; /* stored MIDR value */ \
	uint64_t pc_clock; \			uint64_t pc_clock; \
	char __pad[241]			pcpu_bp_harden pc_bp_harden; \
				char __pad[237]
				emasteUnsubmitted Not Done Inline Actions how do we end up with this odd-looking pad size? why did pad decrease by 4? emaste: - how do we end up with this odd-looking pad size? - why did pad decrease by 4?
				andrewAuthorUnsubmitted Not Done Inline Actions It's padded out to be divisible of a page size. I'm not sure why it's this value as it doesn't make sense based on the cache size constant. It was decreased by 4 because I forgot that pointers are 8 bytes on arm64. andrew: It's padded out to be divisible of a page size. I'm not sure why it's this value as it doesn't…

	#ifdef _KERNEL			#ifdef _KERNEL

	struct pcb;			struct pcb;
	struct pcpu;			struct pcpu;

	static inline struct pcpu *			static inline struct pcpu *
	get_pcpu(void)			get_pcpu(void)
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