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head/sys/dev/e1000/e1000_ich8lan.h
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#define E1000_FEXTNVM11_DISABLE_MULR_FIX 0x00002000 | #define E1000_FEXTNVM11_DISABLE_MULR_FIX 0x00002000 | ||||
/* bit24: RXDCTL thresholds granularity: 0 - cache lines, 1 - descriptors */ | /* bit24: RXDCTL thresholds granularity: 0 - cache lines, 1 - descriptors */ | ||||
#define E1000_RXDCTL_THRESH_UNIT_DESC 0x01000000 | #define E1000_RXDCTL_THRESH_UNIT_DESC 0x01000000 | ||||
#define NVM_SIZE_MULTIPLIER 4096 /*multiplier for NVMS field*/ | #define NVM_SIZE_MULTIPLIER 4096 /*multiplier for NVMS field*/ | ||||
#define E1000_FLASH_BASE_ADDR 0xE000 /*offset of NVM access regs*/ | #define E1000_FLASH_BASE_ADDR 0xE000 /*offset of NVM access regs*/ | ||||
#define E1000_CTRL_EXT_NVMVS 0x3 /*NVM valid sector */ | #define E1000_CTRL_EXT_NVMVS 0x3 /*NVM valid sector */ | ||||
#define E1000_TARC0_CB_MULTIQ_3_REQ (1 << 28 | 1 << 29) | #define E1000_TARC0_CB_MULTIQ_3_REQ 0x30000000 | ||||
#define E1000_TARC0_CB_MULTIQ_2_REQ 0x20000000 | |||||
#define PCIE_ICH8_SNOOP_ALL PCIE_NO_SNOOP_ALL | #define PCIE_ICH8_SNOOP_ALL PCIE_NO_SNOOP_ALL | ||||
#define E1000_ICH_RAR_ENTRIES 7 | #define E1000_ICH_RAR_ENTRIES 7 | ||||
#define E1000_PCH2_RAR_ENTRIES 5 /* RAR[0], SHRA[0-3] */ | #define E1000_PCH2_RAR_ENTRIES 5 /* RAR[0], SHRA[0-3] */ | ||||
#define E1000_PCH_LPT_RAR_ENTRIES 12 /* RAR[0], SHRA[0-10] */ | #define E1000_PCH_LPT_RAR_ENTRIES 12 /* RAR[0], SHRA[0-10] */ | ||||
#define PHY_PAGE_SHIFT 5 | #define PHY_PAGE_SHIFT 5 | ||||
#define PHY_REG(page, reg) (((page) << PHY_PAGE_SHIFT) | \ | #define PHY_REG(page, reg) (((page) << PHY_PAGE_SHIFT) | \ | ||||
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