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sys/dev/ichiic/ig4_pci.c
| Show First 20 Lines • Show All 68 Lines • ▼ Show 20 Lines | |||||
| #define PCI_CHIP_LYNXPT_LP_I2C_1 0x9c618086 | #define PCI_CHIP_LYNXPT_LP_I2C_1 0x9c618086 | ||||
| #define PCI_CHIP_LYNXPT_LP_I2C_2 0x9c628086 | #define PCI_CHIP_LYNXPT_LP_I2C_2 0x9c628086 | ||||
| #define PCI_CHIP_BRASWELL_I2C_1 0x22c18086 | #define PCI_CHIP_BRASWELL_I2C_1 0x22c18086 | ||||
| #define PCI_CHIP_BRASWELL_I2C_2 0x22c28086 | #define PCI_CHIP_BRASWELL_I2C_2 0x22c28086 | ||||
| #define PCI_CHIP_BRASWELL_I2C_3 0x22c38086 | #define PCI_CHIP_BRASWELL_I2C_3 0x22c38086 | ||||
| #define PCI_CHIP_BRASWELL_I2C_5 0x22c58086 | #define PCI_CHIP_BRASWELL_I2C_5 0x22c58086 | ||||
| #define PCI_CHIP_BRASWELL_I2C_6 0x22c68086 | #define PCI_CHIP_BRASWELL_I2C_6 0x22c68086 | ||||
| #define PCI_CHIP_BRASWELL_I2C_7 0x22c78086 | #define PCI_CHIP_BRASWELL_I2C_7 0x22c78086 | ||||
| #define PCI_CHIP_SKYLAKE_I2C_0 0x9d608086 | |||||
| #define PCI_CHIP_SKYLAKE_I2C_1 0x9d618086 | |||||
| #define PCI_CHIP_SKYLAKE_I2C_2 0x9d628086 | |||||
| #define PCI_CHIP_SKYLAKE_I2C_3 0x9d638086 | |||||
| #define PCI_CHIP_SKYLAKE_I2C_4 0x9d648086 | |||||
| #define PCI_CHIP_SKYLAKE_I2C_5 0x9d658086 | |||||
| static int | static int | ||||
| ig4iic_pci_probe(device_t dev) | ig4iic_pci_probe(device_t dev) | ||||
| { | { | ||||
| ig4iic_softc_t *sc = device_get_softc(dev); | |||||
| switch(pci_get_devid(dev)) { | switch(pci_get_devid(dev)) { | ||||
| case PCI_CHIP_LYNXPT_LP_I2C_1: | case PCI_CHIP_LYNXPT_LP_I2C_1: | ||||
| device_set_desc(dev, "Intel Lynx Point-LP I2C Controller-1"); | device_set_desc(dev, "Intel Lynx Point-LP I2C Controller-1"); | ||||
| sc->version = IG4_HASWELL; | |||||
| break; | break; | ||||
| case PCI_CHIP_LYNXPT_LP_I2C_2: | case PCI_CHIP_LYNXPT_LP_I2C_2: | ||||
| device_set_desc(dev, "Intel Lynx Point-LP I2C Controller-2"); | device_set_desc(dev, "Intel Lynx Point-LP I2C Controller-2"); | ||||
| sc->version = IG4_HASWELL; | |||||
| break; | break; | ||||
| case PCI_CHIP_BRASWELL_I2C_1: | case PCI_CHIP_BRASWELL_I2C_1: | ||||
| device_set_desc(dev, "Intel Braswell Serial I/O I2C Port 1"); | device_set_desc(dev, "Intel Braswell Serial I/O I2C Port 1"); | ||||
| sc->version = IG4_ATOM; | |||||
| break; | break; | ||||
| case PCI_CHIP_BRASWELL_I2C_2: | case PCI_CHIP_BRASWELL_I2C_2: | ||||
| device_set_desc(dev, "Intel Braswell Serial I/O I2C Port 2"); | device_set_desc(dev, "Intel Braswell Serial I/O I2C Port 2"); | ||||
| sc->version = IG4_ATOM; | |||||
| break; | break; | ||||
| case PCI_CHIP_BRASWELL_I2C_3: | case PCI_CHIP_BRASWELL_I2C_3: | ||||
| device_set_desc(dev, "Intel Braswell Serial I/O I2C Port 3"); | device_set_desc(dev, "Intel Braswell Serial I/O I2C Port 3"); | ||||
| sc->version = IG4_ATOM; | |||||
| break; | break; | ||||
| case PCI_CHIP_BRASWELL_I2C_5: | case PCI_CHIP_BRASWELL_I2C_5: | ||||
| device_set_desc(dev, "Intel Braswell Serial I/O I2C Port 5"); | device_set_desc(dev, "Intel Braswell Serial I/O I2C Port 5"); | ||||
| sc->version = IG4_ATOM; | |||||
| break; | break; | ||||
| case PCI_CHIP_BRASWELL_I2C_6: | case PCI_CHIP_BRASWELL_I2C_6: | ||||
| device_set_desc(dev, "Intel Braswell Serial I/O I2C Port 6"); | device_set_desc(dev, "Intel Braswell Serial I/O I2C Port 6"); | ||||
| sc->version = IG4_ATOM; | |||||
| break; | break; | ||||
| case PCI_CHIP_BRASWELL_I2C_7: | case PCI_CHIP_BRASWELL_I2C_7: | ||||
| device_set_desc(dev, "Intel Braswell Serial I/O I2C Port 7"); | device_set_desc(dev, "Intel Braswell Serial I/O I2C Port 7"); | ||||
| sc->version = IG4_ATOM; | |||||
| break; | |||||
| case PCI_CHIP_SKYLAKE_I2C_0: | |||||
| device_set_desc(dev, "Intel Sunrise Point-LP I2C Controller-0"); | |||||
| sc->version = IG4_SKYLAKE; | |||||
| break; | |||||
| case PCI_CHIP_SKYLAKE_I2C_1: | |||||
| device_set_desc(dev, "Intel Sunrise Point-LP I2C Controller-1"); | |||||
| sc->version = IG4_SKYLAKE; | |||||
| break; | |||||
| case PCI_CHIP_SKYLAKE_I2C_2: | |||||
| device_set_desc(dev, "Intel Sunrise Point-LP I2C Controller-2"); | |||||
| sc->version = IG4_SKYLAKE; | |||||
| break; | |||||
| case PCI_CHIP_SKYLAKE_I2C_3: | |||||
| device_set_desc(dev, "Intel Sunrise Point-LP I2C Controller-3"); | |||||
| sc->version = IG4_SKYLAKE; | |||||
| break; | |||||
| case PCI_CHIP_SKYLAKE_I2C_4: | |||||
| device_set_desc(dev, "Intel Sunrise Point-LP I2C Controller-4"); | |||||
| sc->version = IG4_SKYLAKE; | |||||
| break; | |||||
| case PCI_CHIP_SKYLAKE_I2C_5: | |||||
| device_set_desc(dev, "Intel Sunrise Point-LP I2C Controller-5"); | |||||
| sc->version = IG4_SKYLAKE; | |||||
| break; | break; | ||||
| default: | default: | ||||
| return (ENXIO); | return (ENXIO); | ||||
| } | } | ||||
| return (BUS_PROBE_DEFAULT); | return (BUS_PROBE_DEFAULT); | ||||
| } | } | ||||
| static int | static int | ||||
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