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sys/dev/e1000/if_em.h
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* Increasing this value allows the driver to queue more transmits. Each | * Increasing this value allows the driver to queue more transmits. Each | ||||
* descriptor is 16 bytes. | * descriptor is 16 bytes. | ||||
* Since TDLEN should be multiple of 128bytes, the number of transmit | * Since TDLEN should be multiple of 128bytes, the number of transmit | ||||
* desscriptors should meet the following condition. | * desscriptors should meet the following condition. | ||||
* (num_tx_desc * sizeof(struct e1000_tx_desc)) % 128 == 0 | * (num_tx_desc * sizeof(struct e1000_tx_desc)) % 128 == 0 | ||||
*/ | */ | ||||
#define EM_MIN_TXD 80 | #define EM_MIN_TXD 80 | ||||
#define EM_MAX_TXD 4096 | #define EM_MAX_TXD 4096 | ||||
#ifdef EM_MULTIQUEUE | |||||
#define EM_DEFAULT_TXD 4096 | |||||
#else | |||||
#define EM_DEFAULT_TXD 1024 | #define EM_DEFAULT_TXD 1024 | ||||
#endif | |||||
/* | /* | ||||
* EM_RXD - Maximum number of receive Descriptors | * EM_RXD - Maximum number of receive Descriptors | ||||
* Valid Range: 80-256 for 82542 and 82543-based adapters | * Valid Range: 80-256 for 82542 and 82543-based adapters | ||||
* 80-4096 for others | * 80-4096 for others | ||||
* Default Value: 256 | * Default Value: 256 | ||||
* This value is the number of receive descriptors allocated by the driver. | * This value is the number of receive descriptors allocated by the driver. | ||||
* Increasing this value allows the driver to buffer more incoming packets. | * Increasing this value allows the driver to buffer more incoming packets. | ||||
* Each descriptor is 16 bytes. A receive buffer is also allocated for each | * Each descriptor is 16 bytes. A receive buffer is also allocated for each | ||||
* descriptor. The maximum MTU size is 16110. | * descriptor. The maximum MTU size is 16110. | ||||
* Since TDLEN should be multiple of 128bytes, the number of transmit | * Since TDLEN should be multiple of 128bytes, the number of transmit | ||||
* desscriptors should meet the following condition. | * desscriptors should meet the following condition. | ||||
* (num_tx_desc * sizeof(struct e1000_tx_desc)) % 128 == 0 | * (num_tx_desc * sizeof(struct e1000_tx_desc)) % 128 == 0 | ||||
*/ | */ | ||||
#define EM_MIN_RXD 80 | #define EM_MIN_RXD 80 | ||||
#define EM_MAX_RXD 4096 | #define EM_MAX_RXD 4096 | ||||
#ifdef EM_MULTIQUEUE | |||||
#define EM_DEFAULT_RXD 4096 | |||||
#else | |||||
#define EM_DEFAULT_RXD 1024 | #define EM_DEFAULT_RXD 1024 | ||||
#endif | |||||
/* | /* | ||||
* EM_TIDV - Transmit Interrupt Delay Value | * EM_TIDV - Transmit Interrupt Delay Value | ||||
* Valid Range: 0-65535 (0=off) | * Valid Range: 0-65535 (0=off) | ||||
* Default Value: 64 | * Default Value: 64 | ||||
* This value delays the generation of transmit interrupts in units of | * This value delays the generation of transmit interrupts in units of | ||||
* 1.024 microseconds. Transmit interrupt reduction can improve CPU | * 1.024 microseconds. Transmit interrupt reduction can improve CPU | ||||
* efficiency if properly tuned for specific network traffic. If the | * efficiency if properly tuned for specific network traffic. If the | ||||
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* | * | ||||
* CAUTION: When setting EM_RDTR to a value other than 0, adapters | * CAUTION: When setting EM_RDTR to a value other than 0, adapters | ||||
* may hang (stop transmitting) under certain network conditions. | * may hang (stop transmitting) under certain network conditions. | ||||
* If this occurs a WATCHDOG message is logged in the system | * If this occurs a WATCHDOG message is logged in the system | ||||
* event log. In addition, the controller is automatically reset, | * event log. In addition, the controller is automatically reset, | ||||
* restoring the network connection. To eliminate the potential | * restoring the network connection. To eliminate the potential | ||||
* for the hang ensure that EM_RDTR is set to 0. | * for the hang ensure that EM_RDTR is set to 0. | ||||
*/ | */ | ||||
#ifdef EM_MULTIQUEUE | |||||
#define EM_RDTR 64 | |||||
#else | |||||
#define EM_RDTR 0 | #define EM_RDTR 0 | ||||
#endif | |||||
/* | /* | ||||
* Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544) | * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544) | ||||
* Valid Range: 0-65535 (0=off) | * Valid Range: 0-65535 (0=off) | ||||
* Default Value: 64 | * Default Value: 64 | ||||
* This value, in units of 1.024 microseconds, limits the delay in which a | * This value, in units of 1.024 microseconds, limits the delay in which a | ||||
* receive interrupt is generated. Useful only if EM_RDTR is non-zero, | * receive interrupt is generated. Useful only if EM_RDTR is non-zero, | ||||
* this value ensures that an interrupt is generated after the initial | * this value ensures that an interrupt is generated after the initial | ||||
* packet is received within the set amount of time. Proper tuning, | * packet is received within the set amount of time. Proper tuning, | ||||
* along with EM_RDTR, may improve traffic throughput in specific network | * along with EM_RDTR, may improve traffic throughput in specific network | ||||
* conditions. | * conditions. | ||||
*/ | */ | ||||
#ifdef EM_MULTIQUEUE | |||||
#define EM_RADV 128 | |||||
#else | |||||
#define EM_RADV 64 | #define EM_RADV 64 | ||||
#endif | |||||
/* | /* | ||||
* This parameter controls the max duration of transmit watchdog. | * This parameter controls the max duration of transmit watchdog. | ||||
*/ | */ | ||||
#define EM_WATCHDOG (10 * hz) | #define EM_WATCHDOG (10 * hz) | ||||
/* | /* | ||||
* This parameter controls when the driver calls the routine to reclaim | * This parameter controls when the driver calls the routine to reclaim | ||||
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/* | /* | ||||
* TDBA/RDBA should be aligned on 16 byte boundary. But TDLEN/RDLEN should be | * TDBA/RDBA should be aligned on 16 byte boundary. But TDLEN/RDLEN should be | ||||
* multiple of 128 bytes. So we align TDBA/RDBA on 128 byte boundary. This will | * multiple of 128 bytes. So we align TDBA/RDBA on 128 byte boundary. This will | ||||
* also optimize cache line size effect. H/W supports up to cache line size 128. | * also optimize cache line size effect. H/W supports up to cache line size 128. | ||||
*/ | */ | ||||
#define EM_DBA_ALIGN 128 | #define EM_DBA_ALIGN 128 | ||||
#define SPEED_MODE_BIT (1<<21) /* On PCI-E MACs only */ | /* | ||||
* See Intel 82574 Driver Programming Interface Manual, Section 10.2.6.9 | |||||
*/ | |||||
#define TARC_COMPENSATION_MODE (1 << 7) /* Compensation Mode */ | |||||
#define TARC_SPEED_MODE_BIT (1 << 21) /* On PCI-E MACs only */ | |||||
#define TARC_MQ_FIX (1 << 23) | \ | |||||
(1 << 24) | \ | |||||
(1 << 25) /* Handle errata in MQ mode */ | |||||
#define TARC_ERRATA_BIT (1 << 26) /* Note from errata on 82574 */ | |||||
/* PCI Config defines */ | /* PCI Config defines */ | ||||
#define EM_BAR_TYPE(v) ((v) & EM_BAR_TYPE_MASK) | #define EM_BAR_TYPE(v) ((v) & EM_BAR_TYPE_MASK) | ||||
#define EM_BAR_TYPE_MASK 0x00000001 | #define EM_BAR_TYPE_MASK 0x00000001 | ||||
#define EM_BAR_TYPE_MMEM 0x00000000 | #define EM_BAR_TYPE_MMEM 0x00000000 | ||||
#define EM_BAR_TYPE_FLASH 0x0014 | #define EM_BAR_TYPE_FLASH 0x0014 | ||||
#define EM_BAR_MEM_TYPE(v) ((v) & EM_BAR_MEM_TYPE_MASK) | #define EM_BAR_MEM_TYPE(v) ((v) & EM_BAR_MEM_TYPE_MASK) | ||||
#define EM_BAR_MEM_TYPE_MASK 0x00000006 | #define EM_BAR_MEM_TYPE_MASK 0x00000006 | ||||
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/* | /* | ||||
* 82574 has a nonstandard address for EIAC | * 82574 has a nonstandard address for EIAC | ||||
* and since its only used in MSIX, and in | * and since its only used in MSIX, and in | ||||
* the em driver only 82574 uses MSIX we can | * the em driver only 82574 uses MSIX we can | ||||
* solve it just using this define. | * solve it just using this define. | ||||
*/ | */ | ||||
#define EM_EIAC 0x000DC | #define EM_EIAC 0x000DC | ||||
/* | |||||
* 82574 only reports 3 MSI-X vectors by default; | |||||
* defines assisting with making it report 5 are | |||||
* located here. | |||||
*/ | |||||
#define EM_NVM_PCIE_CTRL 0x1B | |||||
#define EM_NVM_MSIX_N_MASK (0x7 << EM_NVM_MSIX_N_SHIFT) | |||||
#define EM_NVM_MSIX_N_SHIFT 7 | |||||
/* | /* | ||||
* Bus dma allocation structure used by | * Bus dma allocation structure used by | ||||
* e1000_dma_malloc and e1000_dma_free. | * e1000_dma_malloc and e1000_dma_free. | ||||
*/ | */ | ||||
struct em_dma_alloc { | struct em_dma_alloc { | ||||
bus_addr_t dma_paddr; | bus_addr_t dma_paddr; | ||||
caddr_t dma_vaddr; | caddr_t dma_vaddr; | ||||
▲ Show 20 Lines • Show All 116 Lines • ▼ Show 20 Lines | struct adapter { | ||||
struct task link_task; | struct task link_task; | ||||
struct task que_task; | struct task que_task; | ||||
struct taskqueue *tq; /* private task queue */ | struct taskqueue *tq; /* private task queue */ | ||||
eventhandler_tag vlan_attach; | eventhandler_tag vlan_attach; | ||||
eventhandler_tag vlan_detach; | eventhandler_tag vlan_detach; | ||||
u16 num_vlans; | u16 num_vlans; | ||||
u16 num_queues; | u8 num_queues; | ||||
/* | /* | ||||
* Transmit rings: | * Transmit rings: | ||||
* Allocated at run time, an array of rings. | * Allocated at run time, an array of rings. | ||||
*/ | */ | ||||
struct tx_ring *tx_rings; | struct tx_ring *tx_rings; | ||||
int num_tx_desc; | int num_tx_desc; | ||||
u32 txd_cmd; | u32 txd_cmd; | ||||
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