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sys/dev/e1000/if_em.c
/****************************************************************************** | /****************************************************************************** | ||||
Copyright (c) 2001-2014, Intel Corporation | Copyright (c) 2001-2015, Intel Corporation | ||||
All rights reserved. | All rights reserved. | ||||
Redistribution and use in source and binary forms, with or without | Redistribution and use in source and binary forms, with or without | ||||
modification, are permitted provided that the following conditions are met: | modification, are permitted provided that the following conditions are met: | ||||
1. Redistributions of source code must retain the above copyright notice, | 1. Redistributions of source code must retain the above copyright notice, | ||||
this list of conditions and the following disclaimer. | this list of conditions and the following disclaimer. | ||||
▲ Show 20 Lines • Show All 926 Lines • ▼ Show 20 Lines | while ((next = drbr_peek(ifp, txr->br)) != NULL) { | ||||
if_inc_counter(ifp, IFCOUNTER_OBYTES, next->m_pkthdr.len); | if_inc_counter(ifp, IFCOUNTER_OBYTES, next->m_pkthdr.len); | ||||
if (next->m_flags & M_MCAST) | if (next->m_flags & M_MCAST) | ||||
if_inc_counter(ifp, IFCOUNTER_OMCASTS, 1); | if_inc_counter(ifp, IFCOUNTER_OMCASTS, 1); | ||||
if_etherbpfmtap(ifp, next); | if_etherbpfmtap(ifp, next); | ||||
if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0) | if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0) | ||||
break; | break; | ||||
} | } | ||||
if (enq > 0) { | /* Mark the queue as having work */ | ||||
/* Set the watchdog */ | if ((enq > 0) && (txr->busy == EM_TX_IDLE)) | ||||
txr->queue_status = EM_QUEUE_WORKING; | txr->busy = EM_TX_BUSY; | ||||
txr->watchdog_time = ticks; | |||||
} | |||||
if (txr->tx_avail < EM_MAX_SCATTER) | if (txr->tx_avail < EM_MAX_SCATTER) | ||||
em_txeof(txr); | em_txeof(txr); | ||||
if (txr->tx_avail < EM_MAX_SCATTER) | if (txr->tx_avail < EM_MAX_SCATTER) | ||||
if_setdrvflagbits(ifp, IFF_DRV_OACTIVE,0); | if_setdrvflagbits(ifp, IFF_DRV_OACTIVE,0); | ||||
return (err); | return (err); | ||||
} | } | ||||
▲ Show 20 Lines • Show All 68 Lines • ▼ Show 20 Lines | while (!if_sendq_empty(ifp)) { | ||||
*/ | */ | ||||
if (em_xmit(txr, &m_head)) { | if (em_xmit(txr, &m_head)) { | ||||
if (m_head == NULL) | if (m_head == NULL) | ||||
break; | break; | ||||
if_sendq_prepend(ifp, m_head); | if_sendq_prepend(ifp, m_head); | ||||
break; | break; | ||||
} | } | ||||
/* Mark the queue as having work */ | |||||
if (txr->busy == EM_TX_IDLE) | |||||
txr->busy = EM_TX_BUSY; | |||||
/* Send a copy of the frame to the BPF listener */ | /* Send a copy of the frame to the BPF listener */ | ||||
if_etherbpfmtap(ifp, m_head); | if_etherbpfmtap(ifp, m_head); | ||||
/* Set timeout in case hardware has problems transmitting. */ | |||||
txr->watchdog_time = ticks; | |||||
txr->queue_status = EM_QUEUE_WORKING; | |||||
} | } | ||||
return; | return; | ||||
} | } | ||||
static void | static void | ||||
em_start(if_t ifp) | em_start(if_t ifp) | ||||
{ | { | ||||
▲ Show 20 Lines • Show All 1,048 Lines • ▼ Show 20 Lines | * and Report Status (RS) | ||||
ctxd->lower.data |= | ctxd->lower.data |= | ||||
htole32(E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS); | htole32(E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS); | ||||
/* | /* | ||||
* Keep track in the first buffer which | * Keep track in the first buffer which | ||||
* descriptor will be written back | * descriptor will be written back | ||||
*/ | */ | ||||
tx_buffer = &txr->tx_buffers[first]; | tx_buffer = &txr->tx_buffers[first]; | ||||
tx_buffer->next_eop = last; | tx_buffer->next_eop = last; | ||||
/* Update the watchdog time early and often */ | |||||
txr->watchdog_time = ticks; | |||||
/* | /* | ||||
* Advance the Transmit Descriptor Tail (TDT), this tells the E1000 | * Advance the Transmit Descriptor Tail (TDT), this tells the E1000 | ||||
* that this frame is available to transmit. | * that this frame is available to transmit. | ||||
*/ | */ | ||||
bus_dmamap_sync(txr->txdma.dma_tag, txr->txdma.dma_map, | bus_dmamap_sync(txr->txdma.dma_tag, txr->txdma.dma_map, | ||||
BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); | BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); | ||||
E1000_WRITE_REG(&adapter->hw, E1000_TDT(txr->me), i); | E1000_WRITE_REG(&adapter->hw, E1000_TDT(txr->me), i); | ||||
▲ Show 20 Lines • Show All 127 Lines • ▼ Show 20 Lines | else | ||||
trigger = E1000_ICS_RXDMT0; | trigger = E1000_ICS_RXDMT0; | ||||
/* | /* | ||||
** Check on the state of the TX queue(s), this | ** Check on the state of the TX queue(s), this | ||||
** can be done without the lock because its RO | ** can be done without the lock because its RO | ||||
** and the HUNG state will be static if set. | ** and the HUNG state will be static if set. | ||||
*/ | */ | ||||
for (int i = 0; i < adapter->num_queues; i++, txr++) { | for (int i = 0; i < adapter->num_queues; i++, txr++) { | ||||
if ((txr->queue_status == EM_QUEUE_HUNG) && | /* Last cycle a queue was declared hung */ | ||||
(adapter->pause_frames == 0)) | if (txr->busy == EM_TX_HUNG) | ||||
goto hung; | goto hung; | ||||
if (txr->busy >= EM_TX_MAXTRIES) | |||||
txr->busy = EM_TX_HUNG; | |||||
/* Schedule a TX tasklet if needed */ | /* Schedule a TX tasklet if needed */ | ||||
if (txr->tx_avail <= EM_MAX_SCATTER) | if (txr->tx_avail <= EM_MAX_SCATTER) | ||||
taskqueue_enqueue(txr->tq, &txr->tx_task); | taskqueue_enqueue(txr->tq, &txr->tx_task); | ||||
} | } | ||||
adapter->pause_frames = 0; | |||||
callout_reset(&adapter->timer, hz, em_local_timer, adapter); | callout_reset(&adapter->timer, hz, em_local_timer, adapter); | ||||
#ifndef DEVICE_POLLING | #ifndef DEVICE_POLLING | ||||
/* Trigger an RX interrupt to guarantee mbuf refresh */ | /* Trigger an RX interrupt to guarantee mbuf refresh */ | ||||
E1000_WRITE_REG(&adapter->hw, E1000_ICS, trigger); | E1000_WRITE_REG(&adapter->hw, E1000_ICS, trigger); | ||||
#endif | #endif | ||||
return; | return; | ||||
hung: | hung: | ||||
/* Looks like we're hung */ | /* Looks like we're hung */ | ||||
device_printf(adapter->dev, "Watchdog timeout -- resetting\n"); | device_printf(adapter->dev, "Watchdog timeout -- resetting\n"); | ||||
device_printf(adapter->dev, | device_printf(adapter->dev, | ||||
"Queue(%d) tdh = %d, hw tdt = %d\n", txr->me, | "Queue(%d) tdh = %d, hw tdt = %d\n", txr->me, | ||||
E1000_READ_REG(&adapter->hw, E1000_TDH(txr->me)), | E1000_READ_REG(&adapter->hw, E1000_TDH(txr->me)), | ||||
E1000_READ_REG(&adapter->hw, E1000_TDT(txr->me))); | E1000_READ_REG(&adapter->hw, E1000_TDT(txr->me))); | ||||
device_printf(adapter->dev,"TX(%d) desc avail = %d," | device_printf(adapter->dev,"TX(%d) desc avail = %d," | ||||
"Next TX to Clean = %d\n", | "Next TX to Clean = %d\n", | ||||
txr->me, txr->tx_avail, txr->next_to_clean); | txr->me, txr->tx_avail, txr->next_to_clean); | ||||
if_setdrvflagbits(ifp, 0, IFF_DRV_RUNNING); | if_setdrvflagbits(ifp, 0, IFF_DRV_RUNNING); | ||||
adapter->watchdog_events++; | adapter->watchdog_events++; | ||||
adapter->pause_frames = 0; | |||||
em_init_locked(adapter); | em_init_locked(adapter); | ||||
} | } | ||||
static void | static void | ||||
em_update_link_status(struct adapter *adapter) | em_update_link_status(struct adapter *adapter) | ||||
{ | { | ||||
struct e1000_hw *hw = &adapter->hw; | struct e1000_hw *hw = &adapter->hw; | ||||
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines | if (link_check && (adapter->link_active == 0)) { | ||||
if_link_state_change(ifp, LINK_STATE_UP); | if_link_state_change(ifp, LINK_STATE_UP); | ||||
} else if (!link_check && (adapter->link_active == 1)) { | } else if (!link_check && (adapter->link_active == 1)) { | ||||
if_setbaudrate(ifp, 0); | if_setbaudrate(ifp, 0); | ||||
adapter->link_speed = 0; | adapter->link_speed = 0; | ||||
adapter->link_duplex = 0; | adapter->link_duplex = 0; | ||||
if (bootverbose) | if (bootverbose) | ||||
device_printf(dev, "Link is Down\n"); | device_printf(dev, "Link is Down\n"); | ||||
adapter->link_active = 0; | adapter->link_active = 0; | ||||
/* Link down, disable watchdog */ | /* Link down, disable hang detection */ | ||||
for (int i = 0; i < adapter->num_queues; i++, txr++) | for (int i = 0; i < adapter->num_queues; i++, txr++) | ||||
txr->queue_status = EM_QUEUE_IDLE; | txr->busy = EM_TX_IDLE; | ||||
if_link_state_change(ifp, LINK_STATE_DOWN); | if_link_state_change(ifp, LINK_STATE_DOWN); | ||||
} | } | ||||
} | } | ||||
/********************************************************************* | /********************************************************************* | ||||
* | * | ||||
* This routine disables all traffic on the adapter by issuing a | * This routine disables all traffic on the adapter by issuing a | ||||
* global reset on the MAC and deallocates TX/RX buffers. | * global reset on the MAC and deallocates TX/RX buffers. | ||||
Show All 14 Lines | em_stop(void *arg) | ||||
INIT_DEBUGOUT("em_stop: begin"); | INIT_DEBUGOUT("em_stop: begin"); | ||||
em_disable_intr(adapter); | em_disable_intr(adapter); | ||||
callout_stop(&adapter->timer); | callout_stop(&adapter->timer); | ||||
/* Tell the stack that the interface is no longer active */ | /* Tell the stack that the interface is no longer active */ | ||||
if_setdrvflagbits(ifp, IFF_DRV_OACTIVE, IFF_DRV_RUNNING); | if_setdrvflagbits(ifp, IFF_DRV_OACTIVE, IFF_DRV_RUNNING); | ||||
/* Unarm watchdog timer. */ | /* Disarm Hang Detection. */ | ||||
for (int i = 0; i < adapter->num_queues; i++, txr++) { | for (int i = 0; i < adapter->num_queues; i++, txr++) { | ||||
EM_TX_LOCK(txr); | EM_TX_LOCK(txr); | ||||
txr->queue_status = EM_QUEUE_IDLE; | txr->busy = EM_TX_IDLE; | ||||
EM_TX_UNLOCK(txr); | EM_TX_UNLOCK(txr); | ||||
} | } | ||||
e1000_reset_hw(&adapter->hw); | e1000_reset_hw(&adapter->hw); | ||||
E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0); | E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0); | ||||
e1000_led_off(&adapter->hw); | e1000_led_off(&adapter->hw); | ||||
e1000_cleanup_led(&adapter->hw); | e1000_cleanup_led(&adapter->hw); | ||||
▲ Show 20 Lines • Show All 962 Lines • ▼ Show 20 Lines | |||||
#endif /* DEV_NETMAP */ | #endif /* DEV_NETMAP */ | ||||
/* clear the watch index */ | /* clear the watch index */ | ||||
txbuf->next_eop = -1; | txbuf->next_eop = -1; | ||||
} | } | ||||
/* Set number of descriptors available */ | /* Set number of descriptors available */ | ||||
txr->tx_avail = adapter->num_tx_desc; | txr->tx_avail = adapter->num_tx_desc; | ||||
txr->queue_status = EM_QUEUE_IDLE; | txr->busy = EM_TX_IDLE; | ||||
/* Clear checksum offload context. */ | /* Clear checksum offload context. */ | ||||
txr->last_hw_offload = 0; | txr->last_hw_offload = 0; | ||||
txr->last_hw_ipcss = 0; | txr->last_hw_ipcss = 0; | ||||
txr->last_hw_ipcso = 0; | txr->last_hw_ipcso = 0; | ||||
txr->last_hw_tucss = 0; | txr->last_hw_tucss = 0; | ||||
txr->last_hw_tucso = 0; | txr->last_hw_tucso = 0; | ||||
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines | for (int i = 0; i < adapter->num_queues; i++, txr++) { | ||||
/* Init the HEAD/TAIL indices */ | /* Init the HEAD/TAIL indices */ | ||||
E1000_WRITE_REG(hw, E1000_TDT(i), 0); | E1000_WRITE_REG(hw, E1000_TDT(i), 0); | ||||
E1000_WRITE_REG(hw, E1000_TDH(i), 0); | E1000_WRITE_REG(hw, E1000_TDH(i), 0); | ||||
HW_DEBUGOUT2("Base = %x, Length = %x\n", | HW_DEBUGOUT2("Base = %x, Length = %x\n", | ||||
E1000_READ_REG(&adapter->hw, E1000_TDBAL(i)), | E1000_READ_REG(&adapter->hw, E1000_TDBAL(i)), | ||||
E1000_READ_REG(&adapter->hw, E1000_TDLEN(i))); | E1000_READ_REG(&adapter->hw, E1000_TDLEN(i))); | ||||
txr->queue_status = EM_QUEUE_IDLE; | txr->busy = EM_TX_IDLE; | ||||
} | } | ||||
/* Set the default values for the Tx Inter Packet Gap timer */ | /* Set the default values for the Tx Inter Packet Gap timer */ | ||||
switch (adapter->hw.mac.type) { | switch (adapter->hw.mac.type) { | ||||
case e1000_80003es2lan: | case e1000_80003es2lan: | ||||
tipg = DEFAULT_82543_TIPG_IPGR1; | tipg = DEFAULT_82543_TIPG_IPGR1; | ||||
tipg |= DEFAULT_80003ES2LAN_TIPG_IPGR2 << | tipg |= DEFAULT_80003ES2LAN_TIPG_IPGR2 << | ||||
E1000_TIPG_IPGR2_SHIFT; | E1000_TIPG_IPGR2_SHIFT; | ||||
▲ Show 20 Lines • Show All 366 Lines • ▼ Show 20 Lines | em_txeof(struct tx_ring *txr) | ||||
if_t ifp = adapter->ifp; | if_t ifp = adapter->ifp; | ||||
EM_TX_LOCK_ASSERT(txr); | EM_TX_LOCK_ASSERT(txr); | ||||
#ifdef DEV_NETMAP | #ifdef DEV_NETMAP | ||||
if (netmap_tx_irq(ifp, txr->me)) | if (netmap_tx_irq(ifp, txr->me)) | ||||
return; | return; | ||||
#endif /* DEV_NETMAP */ | #endif /* DEV_NETMAP */ | ||||
/* No work, make sure watchdog is off */ | /* No work, make sure hang detection is disabled */ | ||||
if (txr->tx_avail == adapter->num_tx_desc) { | if (txr->tx_avail == adapter->num_tx_desc) { | ||||
txr->queue_status = EM_QUEUE_IDLE; | txr->busy = EM_TX_IDLE; | ||||
return; | return; | ||||
} | } | ||||
processed = 0; | processed = 0; | ||||
first = txr->next_to_clean; | first = txr->next_to_clean; | ||||
tx_desc = &txr->tx_base[first]; | tx_desc = &txr->tx_base[first]; | ||||
tx_buffer = &txr->tx_buffers[first]; | tx_buffer = &txr->tx_buffers[first]; | ||||
last = tx_buffer->next_eop; | last = tx_buffer->next_eop; | ||||
Show All 26 Lines | while (first != done) { | ||||
tx_buffer->map, | tx_buffer->map, | ||||
BUS_DMASYNC_POSTWRITE); | BUS_DMASYNC_POSTWRITE); | ||||
bus_dmamap_unload(txr->txtag, | bus_dmamap_unload(txr->txtag, | ||||
tx_buffer->map); | tx_buffer->map); | ||||
m_freem(tx_buffer->m_head); | m_freem(tx_buffer->m_head); | ||||
tx_buffer->m_head = NULL; | tx_buffer->m_head = NULL; | ||||
} | } | ||||
tx_buffer->next_eop = -1; | tx_buffer->next_eop = -1; | ||||
txr->watchdog_time = ticks; | |||||
if (++first == adapter->num_tx_desc) | if (++first == adapter->num_tx_desc) | ||||
first = 0; | first = 0; | ||||
tx_buffer = &txr->tx_buffers[first]; | tx_buffer = &txr->tx_buffers[first]; | ||||
tx_desc = &txr->tx_base[first]; | tx_desc = &txr->tx_base[first]; | ||||
} | } | ||||
if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); | if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); | ||||
/* See if we can continue to the next packet */ | /* See if we can continue to the next packet */ | ||||
last = tx_buffer->next_eop; | last = tx_buffer->next_eop; | ||||
if (last != -1) { | if (last != -1) { | ||||
eop_desc = &txr->tx_base[last]; | eop_desc = &txr->tx_base[last]; | ||||
/* Get new done point */ | /* Get new done point */ | ||||
if (++last == adapter->num_tx_desc) last = 0; | if (++last == adapter->num_tx_desc) last = 0; | ||||
done = last; | done = last; | ||||
} else | } else | ||||
break; | break; | ||||
} | } | ||||
bus_dmamap_sync(txr->txdma.dma_tag, txr->txdma.dma_map, | bus_dmamap_sync(txr->txdma.dma_tag, txr->txdma.dma_map, | ||||
BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); | BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); | ||||
txr->next_to_clean = first; | txr->next_to_clean = first; | ||||
/* | /* | ||||
** Watchdog calculation, we know there's | ** Hang detection: we know there's work outstanding | ||||
** work outstanding or the first return | ** or the entry return would have been taken, so no | ||||
** would have been taken, so none processed | ** descriptor processed here indicates a potential hang. | ||||
** for too long indicates a hang. local timer | ** The local timer will examine this and do a reset if needed. | ||||
** will examine this and do a reset if needed. | |||||
*/ | */ | ||||
if ((!processed) && ((ticks - txr->watchdog_time) > EM_WATCHDOG)) | if (processed == 0) { | ||||
txr->queue_status = EM_QUEUE_HUNG; | if (txr->busy != EM_TX_HUNG) | ||||
++txr->busy; | |||||
} else /* At least one descriptor was cleaned */ | |||||
txr->busy = EM_TX_BUSY; /* note this clears HUNG */ | |||||
/* | /* | ||||
* If we have a minimum free, clear IFF_DRV_OACTIVE | * If we have a minimum free, clear IFF_DRV_OACTIVE | ||||
* to tell the stack that it is OK to send packets. | * to tell the stack that it is OK to send packets. | ||||
* Notice that all writes of OACTIVE happen under the | * Notice that all writes of OACTIVE happen under the | ||||
* TX lock which, with a single queue, guarantees | * TX lock which, with a single queue, guarantees | ||||
* sanity. | * sanity. | ||||
*/ | */ | ||||
if (txr->tx_avail >= EM_MAX_SCATTER) | if (txr->tx_avail >= EM_MAX_SCATTER) | ||||
if_setdrvflagbits(ifp, 0, IFF_DRV_OACTIVE); | if_setdrvflagbits(ifp, 0, IFF_DRV_OACTIVE); | ||||
/* Disable watchdog if all clean */ | /* Disable hang detection if all clean */ | ||||
if (txr->tx_avail == adapter->num_tx_desc) { | if (txr->tx_avail == adapter->num_tx_desc) | ||||
txr->queue_status = EM_QUEUE_IDLE; | txr->busy = EM_TX_IDLE; | ||||
} | } | ||||
} | |||||
/********************************************************************* | /********************************************************************* | ||||
* | * | ||||
* Refresh RX descriptor mbufs from system mbuf buffer pool. | * Refresh RX descriptor mbufs from system mbuf buffer pool. | ||||
* | * | ||||
**********************************************************************/ | **********************************************************************/ | ||||
static void | static void | ||||
▲ Show 20 Lines • Show All 1,218 Lines • ▼ Show 20 Lines | em_update_stats_counters(struct adapter *adapter) | ||||
adapter->stats.mcc += E1000_READ_REG(&adapter->hw, E1000_MCC); | adapter->stats.mcc += E1000_READ_REG(&adapter->hw, E1000_MCC); | ||||
adapter->stats.latecol += E1000_READ_REG(&adapter->hw, E1000_LATECOL); | adapter->stats.latecol += E1000_READ_REG(&adapter->hw, E1000_LATECOL); | ||||
adapter->stats.colc += E1000_READ_REG(&adapter->hw, E1000_COLC); | adapter->stats.colc += E1000_READ_REG(&adapter->hw, E1000_COLC); | ||||
adapter->stats.dc += E1000_READ_REG(&adapter->hw, E1000_DC); | adapter->stats.dc += E1000_READ_REG(&adapter->hw, E1000_DC); | ||||
adapter->stats.rlec += E1000_READ_REG(&adapter->hw, E1000_RLEC); | adapter->stats.rlec += E1000_READ_REG(&adapter->hw, E1000_RLEC); | ||||
adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, E1000_XONRXC); | adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, E1000_XONRXC); | ||||
adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, E1000_XONTXC); | adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, E1000_XONTXC); | ||||
/* | adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, E1000_XOFFRXC); | ||||
** For watchdog management we need to know if we have been | |||||
** paused during the last interval, so capture that here. | |||||
*/ | |||||
adapter->pause_frames = E1000_READ_REG(&adapter->hw, E1000_XOFFRXC); | |||||
adapter->stats.xoffrxc += adapter->pause_frames; | |||||
adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, E1000_XOFFTXC); | adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, E1000_XOFFTXC); | ||||
adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, E1000_FCRUC); | adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, E1000_FCRUC); | ||||
adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, E1000_PRC64); | adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, E1000_PRC64); | ||||
adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, E1000_PRC127); | adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, E1000_PRC127); | ||||
adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, E1000_PRC255); | adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, E1000_PRC255); | ||||
adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, E1000_PRC511); | adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, E1000_PRC511); | ||||
adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, E1000_PRC1023); | adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, E1000_PRC1023); | ||||
adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, E1000_PRC1522); | adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, E1000_PRC1522); | ||||
▲ Show 20 Lines • Show All 610 Lines • ▼ Show 20 Lines | else | ||||
printf("and ACTIVE\n"); | printf("and ACTIVE\n"); | ||||
device_printf(dev, "hw tdh = %d, hw tdt = %d\n", | device_printf(dev, "hw tdh = %d, hw tdt = %d\n", | ||||
E1000_READ_REG(&adapter->hw, E1000_TDH(0)), | E1000_READ_REG(&adapter->hw, E1000_TDH(0)), | ||||
E1000_READ_REG(&adapter->hw, E1000_TDT(0))); | E1000_READ_REG(&adapter->hw, E1000_TDT(0))); | ||||
device_printf(dev, "hw rdh = %d, hw rdt = %d\n", | device_printf(dev, "hw rdh = %d, hw rdt = %d\n", | ||||
E1000_READ_REG(&adapter->hw, E1000_RDH(0)), | E1000_READ_REG(&adapter->hw, E1000_RDH(0)), | ||||
E1000_READ_REG(&adapter->hw, E1000_RDT(0))); | E1000_READ_REG(&adapter->hw, E1000_RDT(0))); | ||||
device_printf(dev, "Tx Queue Status = %d\n", txr->queue_status); | device_printf(dev, "Tx Queue Status = %d\n", txr->busy); | ||||
device_printf(dev, "TX descriptors avail = %d\n", | device_printf(dev, "TX descriptors avail = %d\n", | ||||
txr->tx_avail); | txr->tx_avail); | ||||
device_printf(dev, "Tx Descriptors avail failure = %ld\n", | device_printf(dev, "Tx Descriptors avail failure = %ld\n", | ||||
txr->no_desc_avail); | txr->no_desc_avail); | ||||
device_printf(dev, "RX discarded packets = %ld\n", | device_printf(dev, "RX discarded packets = %ld\n", | ||||
rxr->rx_discarded); | rxr->rx_discarded); | ||||
device_printf(dev, "RX Next to Check = %d\n", rxr->next_to_check); | device_printf(dev, "RX Next to Check = %d\n", rxr->next_to_check); | ||||
device_printf(dev, "RX Next to Refresh = %d\n", rxr->next_to_refresh); | device_printf(dev, "RX Next to Refresh = %d\n", rxr->next_to_refresh); | ||||
} | } |