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sys/dev/bwn/if_bwn_phy_g.c
Show First 20 Lines • Show All 66 Lines • ▼ Show 20 Lines | |||||
#include <dev/pci/pcireg.h> | #include <dev/pci/pcireg.h> | ||||
#include <net80211/ieee80211_var.h> | #include <net80211/ieee80211_var.h> | ||||
#include <net80211/ieee80211_radiotap.h> | #include <net80211/ieee80211_radiotap.h> | ||||
#include <net80211/ieee80211_regdomain.h> | #include <net80211/ieee80211_regdomain.h> | ||||
#include <net80211/ieee80211_phy.h> | #include <net80211/ieee80211_phy.h> | ||||
#include <net80211/ieee80211_ratectl.h> | #include <net80211/ieee80211_ratectl.h> | ||||
#include <dev/bwn/if_bwn_siba.h> | |||||
#include <dev/bwn/if_bwnreg.h> | #include <dev/bwn/if_bwnreg.h> | ||||
#include <dev/bwn/if_bwnvar.h> | #include <dev/bwn/if_bwnvar.h> | ||||
#include <dev/bwn/if_bwn_debug.h> | #include <dev/bwn/if_bwn_debug.h> | ||||
#include <dev/bwn/if_bwn_misc.h> | #include <dev/bwn/if_bwn_misc.h> | ||||
#include <dev/bwn/if_bwn_phy_g.h> | #include <dev/bwn/if_bwn_phy_g.h> | ||||
#include "bhnd_nvram_map.h" | |||||
static void bwn_phy_g_init_sub(struct bwn_mac *); | static void bwn_phy_g_init_sub(struct bwn_mac *); | ||||
static uint8_t bwn_has_hwpctl(struct bwn_mac *); | static uint8_t bwn_has_hwpctl(struct bwn_mac *); | ||||
static void bwn_phy_init_b5(struct bwn_mac *); | static void bwn_phy_init_b5(struct bwn_mac *); | ||||
static void bwn_phy_init_b6(struct bwn_mac *); | static void bwn_phy_init_b6(struct bwn_mac *); | ||||
static void bwn_phy_init_a(struct bwn_mac *); | static void bwn_phy_init_a(struct bwn_mac *); | ||||
static void bwn_loopback_calcgain(struct bwn_mac *); | static void bwn_loopback_calcgain(struct bwn_mac *); | ||||
static uint16_t bwn_rf_init_bcm2050(struct bwn_mac *); | static uint16_t bwn_rf_init_bcm2050(struct bwn_mac *); | ||||
static void bwn_lo_g_init(struct bwn_mac *); | static void bwn_lo_g_init(struct bwn_mac *); | ||||
▲ Show 20 Lines • Show All 60 Lines • ▼ Show 20 Lines | |||||
{ | { | ||||
struct bwn_softc *sc = mac->mac_sc; | struct bwn_softc *sc = mac->mac_sc; | ||||
struct bwn_phy *phy = &mac->mac_phy; | struct bwn_phy *phy = &mac->mac_phy; | ||||
struct bwn_phy_g *pg = &phy->phy_g; | struct bwn_phy_g *pg = &phy->phy_g; | ||||
unsigned int i; | unsigned int i; | ||||
int16_t pab0, pab1, pab2; | int16_t pab0, pab1, pab2; | ||||
static int8_t bwn_phy_g_tssi2dbm_table[] = BWN_PHY_G_TSSI2DBM_TABLE; | static int8_t bwn_phy_g_tssi2dbm_table[] = BWN_PHY_G_TSSI2DBM_TABLE; | ||||
int8_t bg; | int8_t bg; | ||||
int error; | |||||
bg = (int8_t)siba_sprom_get_tssi_bg(sc->sc_dev); | /* Fetch SPROM configuration */ | ||||
pab0 = (int16_t)siba_sprom_get_pa0b0(sc->sc_dev); | #define BWN_PHY_G_READVAR(_dev, _type, _name, _result) \ | ||||
pab1 = (int16_t)siba_sprom_get_pa0b1(sc->sc_dev); | do { \ | ||||
pab2 = (int16_t)siba_sprom_get_pa0b2(sc->sc_dev); | error = bhnd_nvram_getvar_ ##_type((_dev), (_name), (_result)); \ | ||||
if (error) { \ | |||||
device_printf((_dev), "NVRAM variable %s unreadable: " \ | |||||
"%d\n", (_name), error); \ | |||||
return (error); \ | |||||
} \ | |||||
} while(0) | |||||
if ((siba_get_chipid(sc->sc_dev) == 0x4301) && (phy->rf_ver != 0x2050)) | BWN_PHY_G_READVAR(sc->sc_dev, int8, BHND_NVAR_PA0ITSSIT, &bg); | ||||
device_printf(sc->sc_dev, "not supported anymore\n"); | BWN_PHY_G_READVAR(sc->sc_dev, int16, BHND_NVAR_PA0B0, &pab0); | ||||
BWN_PHY_G_READVAR(sc->sc_dev, int16, BHND_NVAR_PA0B1, &pab1); | |||||
BWN_PHY_G_READVAR(sc->sc_dev, int16, BHND_NVAR_PA0B2, &pab2); | |||||
BWN_PHY_G_READVAR(sc->sc_dev, int16, BHND_NVAR_PA0MAXPWR, | |||||
&pg->pg_pa0maxpwr); | |||||
#undef BWN_PHY_G_READVAR | |||||
pg->pg_flags = 0; | pg->pg_flags = 0; | ||||
if (pab0 == 0 || pab1 == 0 || pab2 == 0 || pab0 == -1 || pab1 == -1 || | if (pab0 == 0 || pab1 == 0 || pab2 == 0 || pab0 == -1 || pab1 == -1 || | ||||
pab2 == -1) { | pab2 == -1) { | ||||
pg->pg_idletssi = 52; | pg->pg_idletssi = 52; | ||||
pg->pg_tssi2dbm = bwn_phy_g_tssi2dbm_table; | pg->pg_tssi2dbm = bwn_phy_g_tssi2dbm_table; | ||||
return (0); | return (0); | ||||
} | } | ||||
▲ Show 20 Lines • Show All 107 Lines • ▼ Show 20 Lines | bwn_phy_g_prepare_hw(struct bwn_mac *mac) | ||||
if (phy->rf_ver == 0x2050 && phy->rf_rev < 6) | if (phy->rf_ver == 0x2050 && phy->rf_rev < 6) | ||||
pg->pg_bbatt.att = 0; | pg->pg_bbatt.att = 0; | ||||
else | else | ||||
pg->pg_bbatt.att = 2; | pg->pg_bbatt.att = 2; | ||||
/* prepare Radio Attenuation */ | /* prepare Radio Attenuation */ | ||||
pg->pg_rfatt.padmix = 0; | pg->pg_rfatt.padmix = 0; | ||||
if (siba_get_pci_subvendor(sc->sc_dev) == SIBA_BOARDVENDOR_BCM && | if (sc->sc_board_info.board_vendor == PCI_VENDOR_BROADCOM && | ||||
siba_get_pci_subdevice(sc->sc_dev) == SIBA_BOARD_BCM4309G) { | sc->sc_board_info.board_type == BHND_BOARD_BCM94309G) { | ||||
if (siba_get_pci_revid(sc->sc_dev) < 0x43) { | if (sc->sc_board_info.board_rev < 0x43) { | ||||
pg->pg_rfatt.att = 2; | pg->pg_rfatt.att = 2; | ||||
goto done; | goto done; | ||||
} else if (siba_get_pci_revid(sc->sc_dev) < 0x51) { | } else if (sc->sc_board_info.board_rev < 0x51) { | ||||
pg->pg_rfatt.att = 3; | pg->pg_rfatt.att = 3; | ||||
goto done; | goto done; | ||||
} | } | ||||
} | } | ||||
if (phy->type == BWN_PHYTYPE_A) { | if (phy->type == BWN_PHYTYPE_A) { | ||||
pg->pg_rfatt.att = 0x60; | pg->pg_rfatt.att = 0x60; | ||||
goto done; | goto done; | ||||
} | } | ||||
switch (phy->rf_ver) { | switch (phy->rf_ver) { | ||||
case 0x2050: | case 0x2050: | ||||
switch (phy->rf_rev) { | switch (phy->rf_rev) { | ||||
case 0: | case 0: | ||||
pg->pg_rfatt.att = 5; | pg->pg_rfatt.att = 5; | ||||
goto done; | goto done; | ||||
case 1: | case 1: | ||||
if (phy->type == BWN_PHYTYPE_G) { | if (phy->type == BWN_PHYTYPE_G) { | ||||
if (siba_get_pci_subvendor(sc->sc_dev) == | if (sc->sc_board_info.board_vendor == | ||||
SIBA_BOARDVENDOR_BCM && | PCI_VENDOR_BROADCOM && | ||||
siba_get_pci_subdevice(sc->sc_dev) == | sc->sc_board_info.board_type == | ||||
SIBA_BOARD_BCM4309G && | BHND_BOARD_BCM94309G && | ||||
siba_get_pci_revid(sc->sc_dev) >= 30) | sc->sc_board_info.board_rev >= 30) | ||||
pg->pg_rfatt.att = 3; | pg->pg_rfatt.att = 3; | ||||
else if (siba_get_pci_subvendor(sc->sc_dev) == | else if (sc->sc_board_info.board_vendor == | ||||
SIBA_BOARDVENDOR_BCM && | PCI_VENDOR_BROADCOM && | ||||
siba_get_pci_subdevice(sc->sc_dev) == | sc->sc_board_info.board_type == | ||||
SIBA_BOARD_BU4306) | BHND_BOARD_BU4306) | ||||
pg->pg_rfatt.att = 3; | pg->pg_rfatt.att = 3; | ||||
else | else | ||||
pg->pg_rfatt.att = 1; | pg->pg_rfatt.att = 1; | ||||
} else { | } else { | ||||
if (siba_get_pci_subvendor(sc->sc_dev) == | if (sc->sc_board_info.board_vendor == | ||||
SIBA_BOARDVENDOR_BCM && | PCI_VENDOR_BROADCOM && | ||||
siba_get_pci_subdevice(sc->sc_dev) == | sc->sc_board_info.board_type == | ||||
SIBA_BOARD_BCM4309G && | BHND_BOARD_BCM94309G && | ||||
siba_get_pci_revid(sc->sc_dev) >= 30) | sc->sc_board_info.board_rev >= 30) | ||||
pg->pg_rfatt.att = 7; | pg->pg_rfatt.att = 7; | ||||
else | else | ||||
pg->pg_rfatt.att = 6; | pg->pg_rfatt.att = 6; | ||||
} | } | ||||
goto done; | goto done; | ||||
case 2: | case 2: | ||||
if (phy->type == BWN_PHYTYPE_G) { | if (phy->type == BWN_PHYTYPE_G) { | ||||
if (siba_get_pci_subvendor(sc->sc_dev) == | if (sc->sc_board_info.board_vendor == | ||||
SIBA_BOARDVENDOR_BCM && | PCI_VENDOR_BROADCOM && | ||||
siba_get_pci_subdevice(sc->sc_dev) == | sc->sc_board_info.board_type == | ||||
SIBA_BOARD_BCM4309G && | BHND_BOARD_BCM94309G && | ||||
siba_get_pci_revid(sc->sc_dev) >= 30) | sc->sc_board_info.board_rev >= 30) | ||||
pg->pg_rfatt.att = 3; | pg->pg_rfatt.att = 3; | ||||
else if (siba_get_pci_subvendor(sc->sc_dev) == | else if (sc->sc_board_info.board_vendor == | ||||
SIBA_BOARDVENDOR_BCM && | PCI_VENDOR_BROADCOM && | ||||
siba_get_pci_subdevice(sc->sc_dev) == | sc->sc_board_info.board_type == | ||||
SIBA_BOARD_BU4306) | BHND_BOARD_BU4306) | ||||
pg->pg_rfatt.att = 5; | pg->pg_rfatt.att = 5; | ||||
else if (siba_get_chipid(sc->sc_dev) == 0x4320) | else if (sc->sc_cid.chip_id == | ||||
BHND_CHIPID_BCM4320) | |||||
pg->pg_rfatt.att = 4; | pg->pg_rfatt.att = 4; | ||||
else | else | ||||
pg->pg_rfatt.att = 3; | pg->pg_rfatt.att = 3; | ||||
} else | } else | ||||
pg->pg_rfatt.att = 6; | pg->pg_rfatt.att = 6; | ||||
goto done; | goto done; | ||||
case 3: | case 3: | ||||
pg->pg_rfatt.att = 5; | pg->pg_rfatt.att = 5; | ||||
▲ Show 20 Lines • Show All 289 Lines • ▼ Show 20 Lines | if (cck < 0 && ofdm < 0) { | ||||
ofdm = 0; | ofdm = 0; | ||||
} | } | ||||
tssi = (cck < 0) ? ofdm : ((ofdm < 0) ? cck : (cck + ofdm) / 2); | tssi = (cck < 0) ? ofdm : ((ofdm < 0) ? cck : (cck + ofdm) / 2); | ||||
if (pg->pg_avgtssi != 0xff) | if (pg->pg_avgtssi != 0xff) | ||||
tssi = (tssi + pg->pg_avgtssi) / 2; | tssi = (tssi + pg->pg_avgtssi) / 2; | ||||
pg->pg_avgtssi = tssi; | pg->pg_avgtssi = tssi; | ||||
KASSERT(tssi < BWN_TSSI_MAX, ("%s:%d: fail", __func__, __LINE__)); | KASSERT(tssi < BWN_TSSI_MAX, ("%s:%d: fail", __func__, __LINE__)); | ||||
max = siba_sprom_get_maxpwr_bg(sc->sc_dev); | max = pg->pg_pa0maxpwr; | ||||
if (siba_sprom_get_bf_lo(sc->sc_dev) & BWN_BFL_PACTRL) | if (sc->sc_board_info.board_flags & BHND_BFL_PACTRL) | ||||
max -= 3; | max -= 3; | ||||
if (max >= 120) { | if (max >= 120) { | ||||
device_printf(sc->sc_dev, "invalid max TX-power value\n"); | device_printf(sc->sc_dev, "invalid max TX-power value\n"); | ||||
max = 80; | max = 80; | ||||
siba_sprom_set_maxpwr_bg(sc->sc_dev, max); | pg->pg_pa0maxpwr = max; | ||||
} | } | ||||
power = MIN(MAX((phy->txpower < 0) ? 0 : (phy->txpower << 2), 0), max) - | power = MIN(MAX((phy->txpower < 0) ? 0 : (phy->txpower << 2), 0), max) - | ||||
(pg->pg_tssi2dbm[MIN(MAX(pg->pg_idletssi - pg->pg_curtssi + | (pg->pg_tssi2dbm[MIN(MAX(pg->pg_idletssi - pg->pg_curtssi + | ||||
tssi, 0x00), 0x3f)]); | tssi, 0x00), 0x3f)]); | ||||
if (power == 0) | if (power == 0) | ||||
return (BWN_TXPWR_RES_DONE); | return (BWN_TXPWR_RES_DONE); | ||||
Show All 27 Lines | bwn_phy_g_set_txpwr(struct bwn_mac *mac) | ||||
bwn_phy_g_setatt(mac, &bbatt, &rfatt); | bwn_phy_g_setatt(mac, &bbatt, &rfatt); | ||||
txctl = pg->pg_txctl; | txctl = pg->pg_txctl; | ||||
if ((phy->rf_ver == 0x2050) && (phy->rf_rev == 2)) { | if ((phy->rf_ver == 0x2050) && (phy->rf_rev == 2)) { | ||||
if (rfatt <= 1) { | if (rfatt <= 1) { | ||||
if (txctl == 0) { | if (txctl == 0) { | ||||
txctl = BWN_TXCTL_PA2DB | BWN_TXCTL_TXMIX; | txctl = BWN_TXCTL_PA2DB | BWN_TXCTL_TXMIX; | ||||
rfatt += 2; | rfatt += 2; | ||||
bbatt += 2; | bbatt += 2; | ||||
} else if (siba_sprom_get_bf_lo(sc->sc_dev) & | } else if (sc->sc_board_info.board_flags & | ||||
BWN_BFL_PACTRL) { | BHND_BFL_PACTRL) { | ||||
bbatt += 4 * (rfatt - 2); | bbatt += 4 * (rfatt - 2); | ||||
rfatt = 2; | rfatt = 2; | ||||
} | } | ||||
} else if (rfatt > 4 && txctl) { | } else if (rfatt > 4 && txctl) { | ||||
txctl = 0; | txctl = 0; | ||||
if (bbatt < 3) { | if (bbatt < 3) { | ||||
rfatt -= 3; | rfatt -= 3; | ||||
bbatt += 2; | bbatt += 2; | ||||
▲ Show 20 Lines • Show All 81 Lines • ▼ Show 20 Lines | |||||
void | void | ||||
bwn_phy_g_task_60s(struct bwn_mac *mac) | bwn_phy_g_task_60s(struct bwn_mac *mac) | ||||
{ | { | ||||
struct bwn_phy *phy = &mac->mac_phy; | struct bwn_phy *phy = &mac->mac_phy; | ||||
struct bwn_softc *sc = mac->mac_sc; | struct bwn_softc *sc = mac->mac_sc; | ||||
uint8_t old = phy->chan; | uint8_t old = phy->chan; | ||||
if (!(siba_sprom_get_bf_lo(sc->sc_dev) & BWN_BFL_RSSI)) | if (!(sc->sc_board_info.board_flags & BHND_BFL_ADCDIV)) | ||||
return; | return; | ||||
bwn_mac_suspend(mac); | bwn_mac_suspend(mac); | ||||
bwn_nrssi_slope_11g(mac); | bwn_nrssi_slope_11g(mac); | ||||
if ((phy->rf_ver == 0x2050) && (phy->rf_rev == 8)) { | if ((phy->rf_ver == 0x2050) && (phy->rf_rev == 8)) { | ||||
bwn_switch_channel(mac, (old >= 8) ? 1 : 13); | bwn_switch_channel(mac, (old >= 8) ? 1 : 13); | ||||
bwn_switch_channel(mac, old); | bwn_switch_channel(mac, old); | ||||
} | } | ||||
▲ Show 20 Lines • Show All 70 Lines • ▼ Show 20 Lines | BWN_RF_WRITE(mac, 0x52, | ||||
pg->pg_loctl.tx_magn); | pg->pg_loctl.tx_magn); | ||||
} else { | } else { | ||||
BWN_RF_SETMASK(mac, 0x52, 0xfff0, pg->pg_loctl.tx_bias); | BWN_RF_SETMASK(mac, 0x52, 0xfff0, pg->pg_loctl.tx_bias); | ||||
} | } | ||||
if (phy->rev >= 6) { | if (phy->rev >= 6) { | ||||
BWN_PHY_SETMASK(mac, BWN_PHY_CCK(0x36), 0x0fff, | BWN_PHY_SETMASK(mac, BWN_PHY_CCK(0x36), 0x0fff, | ||||
(pg->pg_loctl.tx_bias << 12)); | (pg->pg_loctl.tx_bias << 12)); | ||||
} | } | ||||
if (siba_sprom_get_bf_lo(sc->sc_dev) & BWN_BFL_PACTRL) | if (sc->sc_board_info.board_flags & BHND_BFL_PACTRL) | ||||
BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2e), 0x8075); | BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2e), 0x8075); | ||||
else | else | ||||
BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2e), 0x807f); | BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2e), 0x807f); | ||||
if (phy->rev < 2) | if (phy->rev < 2) | ||||
BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2f), 0x101); | BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2f), 0x101); | ||||
else | else | ||||
BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2f), 0x202); | BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2f), 0x202); | ||||
if (phy->gmode || phy->rev >= 2) { | if (phy->gmode || phy->rev >= 2) { | ||||
bwn_lo_g_adjust(mac); | bwn_lo_g_adjust(mac); | ||||
BWN_PHY_WRITE(mac, BWN_PHY_LO_MASK, 0x8078); | BWN_PHY_WRITE(mac, BWN_PHY_LO_MASK, 0x8078); | ||||
} | } | ||||
if (!(siba_sprom_get_bf_lo(sc->sc_dev) & BWN_BFL_RSSI)) { | if (!(sc->sc_board_info.board_flags & BHND_BFL_ADCDIV)) { | ||||
for (i = 0; i < 64; i++) { | for (i = 0; i < 64; i++) { | ||||
BWN_PHY_WRITE(mac, BWN_PHY_NRSSI_CTRL, i); | BWN_PHY_WRITE(mac, BWN_PHY_NRSSI_CTRL, i); | ||||
BWN_PHY_WRITE(mac, BWN_PHY_NRSSI_DATA, | BWN_PHY_WRITE(mac, BWN_PHY_NRSSI_DATA, | ||||
(uint16_t)MIN(MAX(bwn_nrssi_read(mac, i) - 0xffff, | (uint16_t)MIN(MAX(bwn_nrssi_read(mac, i) - 0xffff, | ||||
-32), 31)); | -32), 31)); | ||||
} | } | ||||
bwn_nrssi_threshold(mac); | bwn_nrssi_threshold(mac); | ||||
} else if (phy->gmode || phy->rev >= 2) { | } else if (phy->gmode || phy->rev >= 2) { | ||||
if (pg->pg_nrssi[0] == -1000) { | if (pg->pg_nrssi[0] == -1000) { | ||||
KASSERT(pg->pg_nrssi[1] == -1000, | KASSERT(pg->pg_nrssi[1] == -1000, | ||||
("%s:%d: fail", __func__, __LINE__)); | ("%s:%d: fail", __func__, __LINE__)); | ||||
bwn_nrssi_slope_11g(mac); | bwn_nrssi_slope_11g(mac); | ||||
} else | } else | ||||
bwn_nrssi_threshold(mac); | bwn_nrssi_threshold(mac); | ||||
} | } | ||||
if (phy->rf_rev == 8) | if (phy->rf_rev == 8) | ||||
BWN_PHY_WRITE(mac, BWN_PHY_EXTG(0x05), 0x3230); | BWN_PHY_WRITE(mac, BWN_PHY_EXTG(0x05), 0x3230); | ||||
bwn_phy_hwpctl_init(mac); | bwn_phy_hwpctl_init(mac); | ||||
if ((siba_get_chipid(sc->sc_dev) == 0x4306 | if ((sc->sc_cid.chip_id == BHND_CHIPID_BCM4306 | ||||
&& siba_get_chippkg(sc->sc_dev) == 2) || 0) { | && sc->sc_cid.chip_pkg == 2) || 0) { | ||||
BWN_PHY_MASK(mac, BWN_PHY_CRS0, 0xbfff); | BWN_PHY_MASK(mac, BWN_PHY_CRS0, 0xbfff); | ||||
BWN_PHY_MASK(mac, BWN_PHY_OFDM(0xc3), 0x7fff); | BWN_PHY_MASK(mac, BWN_PHY_OFDM(0xc3), 0x7fff); | ||||
} | } | ||||
} | } | ||||
static void | static void | ||||
bwn_phy_init_b5(struct bwn_mac *mac) | bwn_phy_init_b5(struct bwn_mac *mac) | ||||
{ | { | ||||
struct bwn_phy *phy = &mac->mac_phy; | struct bwn_phy *phy = &mac->mac_phy; | ||||
struct bwn_phy_g *pg = &phy->phy_g; | struct bwn_phy_g *pg = &phy->phy_g; | ||||
struct bwn_softc *sc = mac->mac_sc; | struct bwn_softc *sc = mac->mac_sc; | ||||
uint16_t offset, value; | uint16_t offset, value; | ||||
uint8_t old_channel; | uint8_t old_channel; | ||||
if (phy->analog == 1) | if (phy->analog == 1) | ||||
BWN_RF_SET(mac, 0x007a, 0x0050); | BWN_RF_SET(mac, 0x007a, 0x0050); | ||||
if ((siba_get_pci_subvendor(sc->sc_dev) != SIBA_BOARDVENDOR_BCM) && | if ((sc->sc_board_info.board_vendor != PCI_VENDOR_BROADCOM) && | ||||
(siba_get_pci_subdevice(sc->sc_dev) != SIBA_BOARD_BU4306)) { | (sc->sc_board_info.board_type != BHND_BOARD_BU4306)) { | ||||
value = 0x2120; | value = 0x2120; | ||||
for (offset = 0x00a8; offset < 0x00c7; offset++) { | for (offset = 0x00a8; offset < 0x00c7; offset++) { | ||||
BWN_PHY_WRITE(mac, offset, value); | BWN_PHY_WRITE(mac, offset, value); | ||||
value += 0x202; | value += 0x202; | ||||
} | } | ||||
} | } | ||||
BWN_PHY_SETMASK(mac, 0x0035, 0xf0ff, 0x0700); | BWN_PHY_SETMASK(mac, 0x0035, 0xf0ff, 0x0700); | ||||
if (phy->rf_ver == 0x2050) | if (phy->rf_ver == 0x2050) | ||||
▲ Show 20 Lines • Show All 151 Lines • ▼ Show 20 Lines | bwn_loopback_calcgain(struct bwn_mac *mac) | ||||
BWN_PHY_WRITE(mac, BWN_PHY_LO_CTL, 0); | BWN_PHY_WRITE(mac, BWN_PHY_LO_CTL, 0); | ||||
BWN_PHY_SETMASK(mac, BWN_PHY_CCK(0x2b), 0xffc0, 0x01); | BWN_PHY_SETMASK(mac, BWN_PHY_CCK(0x2b), 0xffc0, 0x01); | ||||
BWN_PHY_SETMASK(mac, BWN_PHY_CCK(0x2b), 0xc0ff, 0x800); | BWN_PHY_SETMASK(mac, BWN_PHY_CCK(0x2b), 0xc0ff, 0x800); | ||||
BWN_PHY_SET(mac, BWN_PHY_RFOVER, 0x0100); | BWN_PHY_SET(mac, BWN_PHY_RFOVER, 0x0100); | ||||
BWN_PHY_MASK(mac, BWN_PHY_RFOVERVAL, 0xcfff); | BWN_PHY_MASK(mac, BWN_PHY_RFOVERVAL, 0xcfff); | ||||
if (siba_sprom_get_bf_lo(sc->sc_dev) & BWN_BFL_EXTLNA) { | if (sc->sc_board_info.board_flags & BHND_BFL_EXTLNA) { | ||||
if (phy->rev >= 7) { | if (phy->rev >= 7) { | ||||
BWN_PHY_SET(mac, BWN_PHY_RFOVER, 0x0800); | BWN_PHY_SET(mac, BWN_PHY_RFOVER, 0x0800); | ||||
BWN_PHY_SET(mac, BWN_PHY_RFOVERVAL, 0x8000); | BWN_PHY_SET(mac, BWN_PHY_RFOVERVAL, 0x8000); | ||||
} | } | ||||
} | } | ||||
BWN_RF_MASK(mac, 0x7a, 0x00f7); | BWN_RF_MASK(mac, 0x7a, 0x00f7); | ||||
j = 0; | j = 0; | ||||
▲ Show 20 Lines • Show All 313 Lines • ▼ Show 20 Lines | bwn_phy_init_b6(struct bwn_mac *mac) | ||||
if (phy->rf_rev == 8) { | if (phy->rf_rev == 8) { | ||||
BWN_RF_WRITE(mac, 0x51, 0); | BWN_RF_WRITE(mac, 0x51, 0); | ||||
BWN_RF_WRITE(mac, 0x52, 0x40); | BWN_RF_WRITE(mac, 0x52, 0x40); | ||||
BWN_RF_WRITE(mac, 0x53, 0xb7); | BWN_RF_WRITE(mac, 0x53, 0xb7); | ||||
BWN_RF_WRITE(mac, 0x54, 0x98); | BWN_RF_WRITE(mac, 0x54, 0x98); | ||||
BWN_RF_WRITE(mac, 0x5a, 0x88); | BWN_RF_WRITE(mac, 0x5a, 0x88); | ||||
BWN_RF_WRITE(mac, 0x5b, 0x6b); | BWN_RF_WRITE(mac, 0x5b, 0x6b); | ||||
BWN_RF_WRITE(mac, 0x5c, 0x0f); | BWN_RF_WRITE(mac, 0x5c, 0x0f); | ||||
if (siba_sprom_get_bf_lo(sc->sc_dev) & BWN_BFL_ALTIQ) { | if (sc->sc_board_info.board_flags & BHND_BFL_ALTIQ) { | ||||
BWN_RF_WRITE(mac, 0x5d, 0xfa); | BWN_RF_WRITE(mac, 0x5d, 0xfa); | ||||
BWN_RF_WRITE(mac, 0x5e, 0xd8); | BWN_RF_WRITE(mac, 0x5e, 0xd8); | ||||
} else { | } else { | ||||
BWN_RF_WRITE(mac, 0x5d, 0xf5); | BWN_RF_WRITE(mac, 0x5d, 0xf5); | ||||
BWN_RF_WRITE(mac, 0x5e, 0xb8); | BWN_RF_WRITE(mac, 0x5e, 0xb8); | ||||
} | } | ||||
BWN_RF_WRITE(mac, 0x0073, 0x0003); | BWN_RF_WRITE(mac, 0x0073, 0x0003); | ||||
BWN_RF_WRITE(mac, 0x007d, 0x00a8); | BWN_RF_WRITE(mac, 0x007d, 0x00a8); | ||||
▲ Show 20 Lines • Show All 81 Lines • ▼ Show 20 Lines | if (BWN_PHY_READ(mac, BWN_PHY_ENCORE) & BWN_PHY_ENCORE_EN) | ||||
BWN_PHY_SET(mac, BWN_PHY_ENCORE, 0x0010); | BWN_PHY_SET(mac, BWN_PHY_ENCORE, 0x0010); | ||||
else | else | ||||
BWN_PHY_MASK(mac, BWN_PHY_ENCORE, ~0x1010); | BWN_PHY_MASK(mac, BWN_PHY_ENCORE, ~0x1010); | ||||
} | } | ||||
bwn_wa_init(mac); | bwn_wa_init(mac); | ||||
if (phy->type == BWN_PHYTYPE_G && | if (phy->type == BWN_PHYTYPE_G && | ||||
(siba_sprom_get_bf_lo(sc->sc_dev) & BWN_BFL_PACTRL)) | (sc->sc_board_info.board_flags & BHND_BFL_PACTRL)) | ||||
BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x6e), 0xe000, 0x3cf); | BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x6e), 0xe000, 0x3cf); | ||||
} | } | ||||
static void | static void | ||||
bwn_wa_write_noisescale(struct bwn_mac *mac, const uint16_t *nst) | bwn_wa_write_noisescale(struct bwn_mac *mac, const uint16_t *nst) | ||||
{ | { | ||||
int i; | int i; | ||||
▲ Show 20 Lines • Show All 253 Lines • ▼ Show 20 Lines | bwn_wa_init(struct bwn_mac *mac) | ||||
case 8: | case 8: | ||||
case 9: | case 9: | ||||
bwn_wa_grev26789(mac); | bwn_wa_grev26789(mac); | ||||
break; | break; | ||||
default: | default: | ||||
KASSERT(0 == 1, ("%s:%d: fail", __func__, __LINE__)); | KASSERT(0 == 1, ("%s:%d: fail", __func__, __LINE__)); | ||||
} | } | ||||
if (siba_get_pci_subvendor(sc->sc_dev) != SIBA_BOARDVENDOR_BCM || | if (sc->sc_board_info.board_vendor != PCI_VENDOR_BROADCOM || | ||||
siba_get_pci_subdevice(sc->sc_dev) != SIBA_BOARD_BU4306 || | sc->sc_board_info.board_type != BHND_BOARD_BU4306 || | ||||
siba_get_pci_revid(sc->sc_dev) != 0x17) { | sc->sc_board_info.board_rev != 0x17) { | ||||
if (phy->rev < 2) { | if (phy->rev < 2) { | ||||
bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX_R1, 1, | bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX_R1, 1, | ||||
0x0002); | 0x0002); | ||||
bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX_R1, 2, | bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX_R1, 2, | ||||
0x0001); | 0x0001); | ||||
} else { | } else { | ||||
bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX, 1, 0x0002); | bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX, 1, 0x0002); | ||||
bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX, 2, 0x0001); | bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX, 2, 0x0001); | ||||
if ((siba_sprom_get_bf_lo(sc->sc_dev) & | if ((sc->sc_board_info.board_flags & | ||||
BWN_BFL_EXTLNA) && | BHND_BFL_EXTLNA) && | ||||
(phy->rev >= 7)) { | (phy->rev >= 7)) { | ||||
BWN_PHY_MASK(mac, BWN_PHY_EXTG(0x11), 0xf7ff); | BWN_PHY_MASK(mac, BWN_PHY_EXTG(0x11), 0xf7ff); | ||||
bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX, | bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX, | ||||
0x0020, 0x0001); | 0x0020, 0x0001); | ||||
bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX, | bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX, | ||||
0x0021, 0x0001); | 0x0021, 0x0001); | ||||
bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX, | bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX, | ||||
0x0022, 0x0001); | 0x0022, 0x0001); | ||||
bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX, | bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX, | ||||
0x0023, 0x0000); | 0x0023, 0x0000); | ||||
bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX, | bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX, | ||||
0x0000, 0x0000); | 0x0000, 0x0000); | ||||
bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX, | bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX, | ||||
0x0003, 0x0002); | 0x0003, 0x0002); | ||||
} | } | ||||
} | } | ||||
} | } | ||||
if (siba_sprom_get_bf_lo(sc->sc_dev) & BWN_BFL_FEM) { | if (sc->sc_board_info.board_flags & BHND_BFL_FEM) { | ||||
BWN_PHY_WRITE(mac, BWN_PHY_GTABCTL, 0x3120); | BWN_PHY_WRITE(mac, BWN_PHY_GTABCTL, 0x3120); | ||||
BWN_PHY_WRITE(mac, BWN_PHY_GTABDATA, 0xc480); | BWN_PHY_WRITE(mac, BWN_PHY_GTABDATA, 0xc480); | ||||
} | } | ||||
bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_UNKNOWN_11, 0, 0); | bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_UNKNOWN_11, 0, 0); | ||||
bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_UNKNOWN_11, 1, 0); | bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_UNKNOWN_11, 1, 0); | ||||
} | } | ||||
▲ Show 20 Lines • Show All 71 Lines • ▼ Show 20 Lines | if (phy->gmode) { | ||||
KASSERT((lna & ~BWN_PHY_RFOVERVAL_LNA) == 0, | KASSERT((lna & ~BWN_PHY_RFOVERVAL_LNA) == 0, | ||||
("%s:%d: fail", __func__, __LINE__)); | ("%s:%d: fail", __func__, __LINE__)); | ||||
KASSERT((pga & ~BWN_PHY_RFOVERVAL_PGA) == 0, | KASSERT((pga & ~BWN_PHY_RFOVERVAL_PGA) == 0, | ||||
("%s:%d: fail", __func__, __LINE__)); | ("%s:%d: fail", __func__, __LINE__)); | ||||
trsw_rx &= (BWN_PHY_RFOVERVAL_TRSWRX | BWN_PHY_RFOVERVAL_BW); | trsw_rx &= (BWN_PHY_RFOVERVAL_TRSWRX | BWN_PHY_RFOVERVAL_BW); | ||||
rfover = BWN_PHY_RFOVERVAL_UNK | pga | lna | trsw_rx; | rfover = BWN_PHY_RFOVERVAL_UNK | pga | lna | trsw_rx; | ||||
if ((siba_sprom_get_bf_lo(sc->sc_dev) & BWN_BFL_EXTLNA) && | if ((sc->sc_board_info.board_flags & BHND_BFL_EXTLNA) && | ||||
phy->rev > 6) | phy->rev > 6) | ||||
rfover |= BWN_PHY_RFOVERVAL_EXTLNA; | rfover |= BWN_PHY_RFOVERVAL_EXTLNA; | ||||
BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xe300); | BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xe300); | ||||
BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, rfover); | BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, rfover); | ||||
DELAY(10); | DELAY(10); | ||||
rfover |= BWN_PHY_RFOVERVAL_BW_LBW; | rfover |= BWN_PHY_RFOVERVAL_BW_LBW; | ||||
BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, rfover); | BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, rfover); | ||||
▲ Show 20 Lines • Show All 272 Lines • ▼ Show 20 Lines | if (phy->rev >= 2) { | ||||
sav->phy_crs0 = BWN_PHY_READ(mac, BWN_PHY_CRS0); | sav->phy_crs0 = BWN_PHY_READ(mac, BWN_PHY_CRS0); | ||||
BWN_PHY_MASK(mac, BWN_PHY_CLASSCTL, 0xfffc); | BWN_PHY_MASK(mac, BWN_PHY_CLASSCTL, 0xfffc); | ||||
BWN_PHY_MASK(mac, BWN_PHY_CRS0, 0x7fff); | BWN_PHY_MASK(mac, BWN_PHY_CRS0, 0x7fff); | ||||
BWN_PHY_SET(mac, BWN_PHY_ANALOGOVER, 0x0003); | BWN_PHY_SET(mac, BWN_PHY_ANALOGOVER, 0x0003); | ||||
BWN_PHY_MASK(mac, BWN_PHY_ANALOGOVERVAL, 0xfffc); | BWN_PHY_MASK(mac, BWN_PHY_ANALOGOVERVAL, 0xfffc); | ||||
if (phy->type == BWN_PHYTYPE_G) { | if (phy->type == BWN_PHYTYPE_G) { | ||||
if ((phy->rev >= 7) && | if ((phy->rev >= 7) && | ||||
(siba_sprom_get_bf_lo(sc->sc_dev) & | (sc->sc_board_info.board_flags & | ||||
BWN_BFL_EXTLNA)) { | BHND_BFL_EXTLNA)) { | ||||
BWN_PHY_WRITE(mac, BWN_PHY_RFOVER, 0x933); | BWN_PHY_WRITE(mac, BWN_PHY_RFOVER, 0x933); | ||||
} else { | } else { | ||||
BWN_PHY_WRITE(mac, BWN_PHY_RFOVER, 0x133); | BWN_PHY_WRITE(mac, BWN_PHY_RFOVER, 0x133); | ||||
} | } | ||||
} else { | } else { | ||||
BWN_PHY_WRITE(mac, BWN_PHY_RFOVER, 0); | BWN_PHY_WRITE(mac, BWN_PHY_RFOVER, 0); | ||||
} | } | ||||
BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x3e), 0); | BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x3e), 0); | ||||
▲ Show 20 Lines • Show All 441 Lines • ▼ Show 20 Lines | bwn_nrssi_threshold(struct bwn_mac *mac) | ||||
struct bwn_phy_g *pg = &phy->phy_g; | struct bwn_phy_g *pg = &phy->phy_g; | ||||
struct bwn_softc *sc = mac->mac_sc; | struct bwn_softc *sc = mac->mac_sc; | ||||
int32_t a, b; | int32_t a, b; | ||||
int16_t tmp16; | int16_t tmp16; | ||||
uint16_t tmpu16; | uint16_t tmpu16; | ||||
KASSERT(phy->type == BWN_PHYTYPE_G, ("%s: fail", __func__)); | KASSERT(phy->type == BWN_PHYTYPE_G, ("%s: fail", __func__)); | ||||
if (phy->gmode && (siba_sprom_get_bf_lo(sc->sc_dev) & BWN_BFL_RSSI)) { | if (phy->gmode && (sc->sc_board_info.board_flags & BHND_BFL_ADCDIV)) { | ||||
if (!pg->pg_aci_wlan_automatic && pg->pg_aci_enable) { | if (!pg->pg_aci_wlan_automatic && pg->pg_aci_enable) { | ||||
a = 0x13; | a = 0x13; | ||||
b = 0x12; | b = 0x12; | ||||
} else { | } else { | ||||
a = 0xe; | a = 0xe; | ||||
b = 0x11; | b = 0x11; | ||||
} | } | ||||
▲ Show 20 Lines • Show All 426 Lines • ▼ Show 20 Lines | bwn_phy_hwpctl_init(struct bwn_mac *mac) | ||||
struct bwn_rfatt old_rfatt, rfatt; | struct bwn_rfatt old_rfatt, rfatt; | ||||
struct bwn_bbatt old_bbatt, bbatt; | struct bwn_bbatt old_bbatt, bbatt; | ||||
struct bwn_softc *sc = mac->mac_sc; | struct bwn_softc *sc = mac->mac_sc; | ||||
uint8_t old_txctl = 0; | uint8_t old_txctl = 0; | ||||
KASSERT(phy->type == BWN_PHYTYPE_G, | KASSERT(phy->type == BWN_PHYTYPE_G, | ||||
("%s:%d: fail", __func__, __LINE__)); | ("%s:%d: fail", __func__, __LINE__)); | ||||
if ((siba_get_pci_subvendor(sc->sc_dev) == SIBA_BOARDVENDOR_BCM) && | if ((sc->sc_board_info.board_vendor == PCI_VENDOR_BROADCOM) && | ||||
(siba_get_pci_subdevice(sc->sc_dev) == SIBA_BOARD_BU4306)) | (sc->sc_board_info.board_type == BHND_BOARD_BU4306)) | ||||
return; | return; | ||||
BWN_PHY_WRITE(mac, 0x0028, 0x8018); | BWN_PHY_WRITE(mac, 0x0028, 0x8018); | ||||
BWN_WRITE_2(mac, BWN_PHY0, BWN_READ_2(mac, BWN_PHY0) & 0xffdf); | BWN_WRITE_2(mac, BWN_PHY0, BWN_READ_2(mac, BWN_PHY0) & 0xffdf); | ||||
if (!phy->gmode) | if (!phy->gmode) | ||||
return; | return; | ||||
▲ Show 20 Lines • Show All 120 Lines • ▼ Show 20 Lines | bwn_hwpctl_init_gphy(struct bwn_mac *mac) | ||||
bwn_phy_g_dc_lookup_init(mac, 1); | bwn_phy_g_dc_lookup_init(mac, 1); | ||||
bwn_hf_write(mac, bwn_hf_read(mac) | BWN_HF_HW_POWERCTL); | bwn_hf_write(mac, bwn_hf_read(mac) | BWN_HF_HW_POWERCTL); | ||||
} | } | ||||
static void | static void | ||||
bwn_phy_g_switch_chan(struct bwn_mac *mac, int channel, uint8_t spu) | bwn_phy_g_switch_chan(struct bwn_mac *mac, int channel, uint8_t spu) | ||||
{ | { | ||||
struct bwn_softc *sc = mac->mac_sc; | struct bwn_softc *sc = mac->mac_sc; | ||||
int error; | |||||
if (spu != 0) | if (spu != 0) | ||||
bwn_spu_workaround(mac, channel); | bwn_spu_workaround(mac, channel); | ||||
BWN_WRITE_2(mac, BWN_CHANNEL, bwn_phy_g_chan2freq(channel)); | BWN_WRITE_2(mac, BWN_CHANNEL, bwn_phy_g_chan2freq(channel)); | ||||
if (channel == 14) { | if (channel == 14) { | ||||
if (siba_sprom_get_ccode(sc->sc_dev) == SIBA_CCODE_JAPAN) | uint8_t cc; | ||||
error = bhnd_nvram_getvar_uint8(sc->sc_dev, BHND_NVAR_CC, &cc); | |||||
if (error) { | |||||
device_printf(sc->sc_dev, "error reading country code " | |||||
"from NVRAM, assuming channel 14 unavailable: %d\n", | |||||
error); | |||||
cc = BWN_SPROM1_CC_WORLDWIDE; | |||||
} | |||||
if (cc == BWN_SPROM1_CC_JP) | |||||
bwn_hf_write(mac, | bwn_hf_write(mac, | ||||
bwn_hf_read(mac) & ~BWN_HF_JAPAN_CHAN14_OFF); | bwn_hf_read(mac) & ~BWN_HF_JAPAN_CHAN14_OFF); | ||||
else | else | ||||
bwn_hf_write(mac, | bwn_hf_write(mac, | ||||
bwn_hf_read(mac) | BWN_HF_JAPAN_CHAN14_OFF); | bwn_hf_read(mac) | BWN_HF_JAPAN_CHAN14_OFF); | ||||
BWN_WRITE_2(mac, BWN_CHANNEL_EXT, | BWN_WRITE_2(mac, BWN_CHANNEL_EXT, | ||||
BWN_READ_2(mac, BWN_CHANNEL_EXT) | (1 << 11)); | BWN_READ_2(mac, BWN_CHANNEL_EXT) | (1 << 11)); | ||||
return; | return; | ||||
▲ Show 20 Lines • Show All 100 Lines • ▼ Show 20 Lines | if (BWN_HAS_LOOPBACK(phy)) { | ||||
for (i = 0; i < 16; i++) { | for (i = 0; i < 16; i++) { | ||||
max_lb_gain -= (i * 6); | max_lb_gain -= (i * 6); | ||||
if (max_lb_gain < 6) | if (max_lb_gain < 6) | ||||
break; | break; | ||||
} | } | ||||
if ((phy->rev < 7) || | if ((phy->rev < 7) || | ||||
!(siba_sprom_get_bf_lo(sc->sc_dev) & BWN_BFL_EXTLNA)) { | !(sc->sc_board_info.board_flags & BHND_BFL_EXTLNA)) { | ||||
if (reg == BWN_PHY_RFOVER) { | if (reg == BWN_PHY_RFOVER) { | ||||
return (0x1b3); | return (0x1b3); | ||||
} else if (reg == BWN_PHY_RFOVERVAL) { | } else if (reg == BWN_PHY_RFOVERVAL) { | ||||
extlna |= (i << 8); | extlna |= (i << 8); | ||||
switch (lpd) { | switch (lpd) { | ||||
case BWN_LPD(0, 1, 1): | case BWN_LPD(0, 1, 1): | ||||
return (0x0f92); | return (0x0f92); | ||||
case BWN_LPD(0, 0, 1): | case BWN_LPD(0, 0, 1): | ||||
Show All 27 Lines | if ((phy->rev < 7) || | ||||
("%s:%d: fail", __func__, __LINE__)); | ("%s:%d: fail", __func__, __LINE__)); | ||||
} | } | ||||
KASSERT(0 == 1, ("%s:%d: fail", __func__, __LINE__)); | KASSERT(0 == 1, ("%s:%d: fail", __func__, __LINE__)); | ||||
} | } | ||||
return (0); | return (0); | ||||
} | } | ||||
if ((phy->rev < 7) || | if ((phy->rev < 7) || | ||||
!(siba_sprom_get_bf_lo(sc->sc_dev) & BWN_BFL_EXTLNA)) { | !(sc->sc_board_info.board_flags & BHND_BFL_EXTLNA)) { | ||||
if (reg == BWN_PHY_RFOVER) { | if (reg == BWN_PHY_RFOVER) { | ||||
return (0x1b3); | return (0x1b3); | ||||
} else if (reg == BWN_PHY_RFOVERVAL) { | } else if (reg == BWN_PHY_RFOVERVAL) { | ||||
switch (lpd) { | switch (lpd) { | ||||
case BWN_LPD(0, 1, 1): | case BWN_LPD(0, 1, 1): | ||||
return (0x0fb2); | return (0x0fb2); | ||||
case BWN_LPD(0, 0, 1): | case BWN_LPD(0, 0, 1): | ||||
return (0x00b2); | return (0x00b2); | ||||
▲ Show 20 Lines • Show All 120 Lines • ▼ Show 20 Lines | |||||
} | } | ||||
static void | static void | ||||
bwn_phy_lock(struct bwn_mac *mac) | bwn_phy_lock(struct bwn_mac *mac) | ||||
{ | { | ||||
struct bwn_softc *sc = mac->mac_sc; | struct bwn_softc *sc = mac->mac_sc; | ||||
struct ieee80211com *ic = &sc->sc_ic; | struct ieee80211com *ic = &sc->sc_ic; | ||||
KASSERT(siba_get_revid(sc->sc_dev) >= 3, | KASSERT(bhnd_get_hwrev(sc->sc_dev) >= 3, | ||||
("%s: unsupported rev %d", __func__, siba_get_revid(sc->sc_dev))); | ("%s: unsupported rev %d", __func__, bhnd_get_hwrev(sc->sc_dev))); | ||||
if (ic->ic_opmode != IEEE80211_M_HOSTAP) | if (ic->ic_opmode != IEEE80211_M_HOSTAP) | ||||
bwn_psctl(mac, BWN_PS_AWAKE); | bwn_psctl(mac, BWN_PS_AWAKE); | ||||
} | } | ||||
static void | static void | ||||
bwn_phy_unlock(struct bwn_mac *mac) | bwn_phy_unlock(struct bwn_mac *mac) | ||||
{ | { | ||||
struct bwn_softc *sc = mac->mac_sc; | struct bwn_softc *sc = mac->mac_sc; | ||||
struct ieee80211com *ic = &sc->sc_ic; | struct ieee80211com *ic = &sc->sc_ic; | ||||
KASSERT(siba_get_revid(sc->sc_dev) >= 3, | KASSERT(bhnd_get_hwrev(sc->sc_dev) >= 3, | ||||
("%s: unsupported rev %d", __func__, siba_get_revid(sc->sc_dev))); | ("%s: unsupported rev %d", __func__, bhnd_get_hwrev(sc->sc_dev))); | ||||
if (ic->ic_opmode != IEEE80211_M_HOSTAP) | if (ic->ic_opmode != IEEE80211_M_HOSTAP) | ||||
bwn_psctl(mac, 0); | bwn_psctl(mac, 0); | ||||
} | } | ||||
static void | static void | ||||
bwn_rf_lock(struct bwn_mac *mac) | bwn_rf_lock(struct bwn_mac *mac) | ||||
{ | { | ||||
Show All 15 Lines |