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sys/dev/bhnd/bhnd_ids.h
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* OCP (Open Core Protocol) Vendor IDs. | * OCP (Open Core Protocol) Vendor IDs. | ||||
* | * | ||||
* OCP-IP assigned vendor codes are used by siba(4) | * OCP-IP assigned vendor codes are used by siba(4) | ||||
*/ | */ | ||||
#define OCP_VENDOR_BCM 0x4243 /**< Broadcom OCP vendor id */ | #define OCP_VENDOR_BCM 0x4243 /**< Broadcom OCP vendor id */ | ||||
/* PCI vendor IDs */ | /* PCI vendor IDs */ | ||||
#define PCI_VENDOR_ASUSTEK 0x1043 | |||||
#define PCI_VENDOR_EPIGRAM 0xfeda | #define PCI_VENDOR_EPIGRAM 0xfeda | ||||
#define PCI_VENDOR_BROADCOM 0x14e4 | #define PCI_VENDOR_BROADCOM 0x14e4 | ||||
#define PCI_VENDOR_3COM 0x10b7 | #define PCI_VENDOR_3COM 0x10b7 | ||||
#define PCI_VENDOR_NETGEAR 0x1385 | #define PCI_VENDOR_NETGEAR 0x1385 | ||||
#define PCI_VENDOR_DIAMOND 0x1092 | #define PCI_VENDOR_DIAMOND 0x1092 | ||||
#define PCI_VENDOR_INTEL 0x8086 | #define PCI_VENDOR_INTEL 0x8086 | ||||
#define PCI_VENDOR_DELL 0x1028 | #define PCI_VENDOR_DELL 0x1028 | ||||
#define PCI_VENDOR_HP 0x103c | #define PCI_VENDOR_HP 0x103c | ||||
#define PCI_VENDOR_HP_COMPAQ 0x0e11 | #define PCI_VENDOR_HP_COMPAQ 0x0e11 | ||||
#define PCI_VENDOR_LINKSYS 0x1737 | |||||
#define PCI_VENDOR_MOTOROLA 0x1057 | |||||
#define PCI_VENDOR_APPLE 0x106b | #define PCI_VENDOR_APPLE 0x106b | ||||
#define PCI_VENDOR_SI_IMAGE 0x1095 /* Silicon Image, used by Arasan SDIO Host */ | #define PCI_VENDOR_SI_IMAGE 0x1095 /* Silicon Image, used by Arasan SDIO Host */ | ||||
#define PCI_VENDOR_BUFFALO 0x1154 /* Buffalo vendor id */ | #define PCI_VENDOR_BUFFALO 0x1154 /* Buffalo vendor id */ | ||||
#define PCI_VENDOR_TI 0x104c /* Texas Instruments */ | #define PCI_VENDOR_TI 0x104c /* Texas Instruments */ | ||||
#define PCI_VENDOR_RICOH 0x1180 /* Ricoh */ | #define PCI_VENDOR_RICOH 0x1180 /* Ricoh */ | ||||
#define PCI_VENDOR_JMICRON 0x197b | #define PCI_VENDOR_JMICRON 0x197b | ||||
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#define BHND_BFL_FEM_BT 0x00400000 /* Board has FEM and switch to share antenna w/ BT */ | #define BHND_BFL_FEM_BT 0x00400000 /* Board has FEM and switch to share antenna w/ BT */ | ||||
#define BHND_BFL_RXCHAIN_OFF_BT 0x00400000 /* one rxchain is to be shut off when BT is active */ | #define BHND_BFL_RXCHAIN_OFF_BT 0x00400000 /* one rxchain is to be shut off when BT is active */ | ||||
#define BHND_BFL_NOCBUCK 0x00800000 /* Power topology doesn't use CBUCK */ | #define BHND_BFL_NOCBUCK 0x00800000 /* Power topology doesn't use CBUCK */ | ||||
#define BHND_BFL_CCKFAVOREVM 0x01000000 /* Favor CCK EVM over spectral mask */ | #define BHND_BFL_CCKFAVOREVM 0x01000000 /* Favor CCK EVM over spectral mask */ | ||||
#define BHND_BFL_PALDO 0x02000000 /* Power topology uses PALDO */ | #define BHND_BFL_PALDO 0x02000000 /* Power topology uses PALDO */ | ||||
#define BHND_BFL_LNLDO2_2P5 0x04000000 /* Select 2.5V as LNLDO2 output voltage */ | #define BHND_BFL_LNLDO2_2P5 0x04000000 /* Select 2.5V as LNLDO2 output voltage */ | ||||
#define BHND_BFL_FASTPWR 0x08000000 | #define BHND_BFL_FASTPWR 0x08000000 | ||||
#define BHND_BFL_UCPWRCTL_MININDX 0x08000000 /* Enforce min power index to avoid FEM damage */ | #define BHND_BFL_UCPWRCTL_MININDX 0x08000000 /* Enforce min power index to avoid FEM damage */ | ||||
#define BHND_BFL_EXTLNA_5GHz 0x10000000 /* Board has an external LNA in 5GHz band */ | #define BHND_BFL_EXTLNA_5GHZ 0x10000000 /* Board has an external LNA in 5GHz band */ | ||||
#define BHND_BFL_TRSW_1by2 0x20000000 /* Board has 2 TRSW's in 1by2 designs */ | #define BHND_BFL_TRSW_1BY2 0x20000000 /* Board has 2 TRSW's in 1by2 designs */ | ||||
#define BHND_BFL_GAINBOOSTA01 0x20000000 /* 5g Gainboost for core0 and core1 */ | #define BHND_BFL_GAINBOOSTA01 0x20000000 /* 5g Gainboost for core0 and core1 */ | ||||
#define BHND_BFL_LO_TRSW_R_5GHz 0x40000000 /* In 5G do not throw TRSW to T for clipLO gain */ | #define BHND_BFL_LO_TRSW_R_5GHZ 0x40000000 /* In 5G do not throw TRSW to T for clipLO gain */ | ||||
#define BHND_BFL_ELNA_GAINDEF 0x80000000 /* Backoff InitGain based on elna_2g/5g field | #define BHND_BFL_ELNA_GAINDEF 0x80000000 /* Backoff InitGain based on elna_2g/5g field | ||||
* when this flag is set | * when this flag is set | ||||
*/ | */ | ||||
#define BHND_BFL_EXTLNA_TX 0x20000000 /* Temp boardflag to indicate to */ | #define BHND_BFL_EXTLNA_TX 0x20000000 /* Temp boardflag to indicate to */ | ||||
/* Boardflags2 */ | /* Boardflags2 */ | ||||
#define BHND_BFL2_RXBB_INT_REG_DIS 0x00000001 /* Board has an external rxbb regulator */ | #define BHND_BFL2_RXBB_INT_REG_DIS 0x00000001 /* Board has an external rxbb regulator */ | ||||
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#define BHND_BFL2_LNA1BYPFORTR2G 0x40000000 /* acphy, enable lna1 bypass for clip gain, 2g */ | #define BHND_BFL2_LNA1BYPFORTR2G 0x40000000 /* acphy, enable lna1 bypass for clip gain, 2g */ | ||||
#define BHND_BFL2_LNA1BYPFORTR5G 0x80000000 /* acphy, enable lna1 bypass for clip gain, 5g */ | #define BHND_BFL2_LNA1BYPFORTR5G 0x80000000 /* acphy, enable lna1 bypass for clip gain, 5g */ | ||||
/* SROM 11 - 11ac boardflag definitions */ | /* SROM 11 - 11ac boardflag definitions */ | ||||
#define BHND_BFL_SROM11_BTCOEX 0x00000001 /* Board supports BTCOEX */ | #define BHND_BFL_SROM11_BTCOEX 0x00000001 /* Board supports BTCOEX */ | ||||
#define BHND_BFL_SROM11_WLAN_BT_SH_XTL 0x00000002 /* bluetooth and wlan share same crystal */ | #define BHND_BFL_SROM11_WLAN_BT_SH_XTL 0x00000002 /* bluetooth and wlan share same crystal */ | ||||
#define BHND_BFL_SROM11_EXTLNA 0x00001000 /* Board has an external LNA in 2.4GHz band */ | #define BHND_BFL_SROM11_EXTLNA 0x00001000 /* Board has an external LNA in 2.4GHz band */ | ||||
#define BHND_BFL_SROM11_EXTLNA_5GHz 0x10000000 /* Board has an external LNA in 5GHz band */ | #define BHND_BFL_SROM11_EXTLNA_5GHZ 0x10000000 /* Board has an external LNA in 5GHz band */ | ||||
#define BHND_BFL_SROM11_GAINBOOSTA01 0x20000000 /* 5g Gainboost for core0 and core1 */ | #define BHND_BFL_SROM11_GAINBOOSTA01 0x20000000 /* 5g Gainboost for core0 and core1 */ | ||||
#define BHND_BFL2_SROM11_APLL_WAR 0x00000002 /* Flag to implement alternative A-band PLL settings */ | #define BHND_BFL2_SROM11_APLL_WAR 0x00000002 /* Flag to implement alternative A-band PLL settings */ | ||||
#define BHND_BFL2_SROM11_ANAPACTRL_2G 0x00100000 /* 2G ext PAs are ctrl-ed by analog PA ctrl lines */ | #define BHND_BFL2_SROM11_ANAPACTRL_2G 0x00100000 /* 2G ext PAs are ctrl-ed by analog PA ctrl lines */ | ||||
#define BHND_BFL2_SROM11_ANAPACTRL_5G 0x00200000 /* 5G ext PAs are ctrl-ed by analog PA ctrl lines */ | #define BHND_BFL2_SROM11_ANAPACTRL_5G 0x00200000 /* 5G ext PAs are ctrl-ed by analog PA ctrl lines */ | ||||
/* Boardflags3 */ | /* Boardflags3 */ | ||||
#define BHND_BFL3_FEMCTRL_SUB 0x00000007 /* acphy, subrevs of femctrl on top of srom_femctrl */ | #define BHND_BFL3_FEMCTRL_SUB 0x00000007 /* acphy, subrevs of femctrl on top of srom_femctrl */ | ||||
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