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	*/			*/
	struct nvme_controller {			struct nvme_controller {

	device_t dev;			device_t dev;

	struct mtx lock;			struct mtx lock;

	uint32_t ready_timeout_in_ms;			uint32_t ready_timeout_in_ms;
				uint32_t quirks;
				#define QUIRK_DELAY_B4_CHK_RDY 1 /* Can't touch MMIO on disable */

	bus_space_tag_t bus_tag;			bus_space_tag_t bus_tag;
	bus_space_handle_t bus_handle;			bus_space_handle_t bus_handle;
	int resource_id;			int resource_id;
	struct resource *resource;			struct resource *resource;

	/*			/*
	* The NVMe spec allows for the MSI-X table to be placed in BAR 4/5,			* The NVMe spec allows for the MSI-X table to be placed in BAR 4/5,
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