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head/sys/dev/bhnd/cores/pci/bhnd_pcireg.h
| Show All 23 Lines | |||||
| #ifndef _BHND_CORES_PCI_BHND_PCIREG_H_ | #ifndef _BHND_CORES_PCI_BHND_PCIREG_H_ | ||||
| #define _BHND_CORES_PCI_BHND_PCIREG_H_ | #define _BHND_CORES_PCI_BHND_PCIREG_H_ | ||||
| /* | /* | ||||
| * PCI/PCIe-Gen1 DMA Constants | * PCI/PCIe-Gen1 DMA Constants | ||||
| */ | */ | ||||
| #define BHND_PCI_DMA32_TRANSLATION 0x40000000 /* Client Mode sb2pcitranslation2 (1 GB) */ | #define BHND_PCI_DMA32_TRANSLATION 0x40000000 /**< PCI DMA32 address translation (sbtopci2) */ | ||||
| #define BHND_PCI_DMA32_SZ 0x40000000 /* Client Mode sb2pcitranslation2 size in bytes */ | #define BHND_PCI_DMA32_MASK BHND_PCI_SBTOPCI2_MASK /**< PCI DMA32 translation mask */ | ||||
| #define BHND_PCIE_DMA32_TRANSLATION BHND_PCI_DMA32_TRANSLATION | #define BHND_PCIE_DMA32_TRANSLATION 0x80000000 /**< PCIe-Gen1 DMA32 address translation (sb2pcitranslation2) */ | ||||
| #define BHND_PCIE_DMA32_SZ BHND_PCI_DMA32_SZ | #define BHND_PCIE_DMA32_MASK BHND_PCIE_SBTOPCI2_MASK /**< PCIe-Gen1 DMA32 translation mask */ | ||||
| #define BHND_PCIE_DMA64_L32 0x00000000 /**< 64-bit client mode sb2pcitranslation2 (2 ZettaBytes, low 32 bits) */ | #define BHND_PCIE_DMA64_TRANSLATION _BHND_PCIE_DMA64(TRANSLATION) /**< PCIe-Gen1 DMA64 address translation (sb2pcitranslation2) */ | ||||
| #define BHND_PCIE_DMA64_H32 0x80000000 /**< 64-bit client mode sb2pcitranslation2 (2 ZettaBytes, high 32 bits) */ | #define BHND_PCIE_DMA64_MASK _BHND_PCIE_DMA64(MASK) /**< PCIe-Gen1 DMA64 translation mask */ | ||||
| #define _BHND_PCIE_DMA64(_x) ((uint64_t)BHND_PCIE_DMA32_ ## _x << 32) | |||||
| /* | /* | ||||
| * PCI Core Registers | * PCI Core Registers | ||||
| */ | */ | ||||
| #define BHND_PCI_CTL 0x000 /**< PCI core control*/ | #define BHND_PCI_CTL 0x000 /**< PCI core control*/ | ||||
| #define BHND_PCI_ARB_CTL 0x010 /**< PCI arbiter control */ | #define BHND_PCI_ARB_CTL 0x010 /**< PCI arbiter control */ | ||||
| #define BHND_PCI_CLKRUN_CTL 0x014 /**< PCI clckrun control (>= rev11) */ | #define BHND_PCI_CLKRUN_CTL 0x014 /**< PCI clckrun control (>= rev11) */ | ||||
| #define BHND_PCI_INTR_STATUS 0x020 /**< Interrupt status */ | #define BHND_PCI_INTR_STATUS 0x020 /**< Interrupt status */ | ||||
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