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sys/mips/include/intr.h
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#ifndef MIPS_NIRQ | #ifndef MIPS_NIRQ | ||||
#define MIPS_NIRQ 128 | #define MIPS_NIRQ 128 | ||||
#endif | #endif | ||||
#ifndef NIRQ | #ifndef NIRQ | ||||
#define NIRQ MIPS_NIRQ | #define NIRQ MIPS_NIRQ | ||||
#endif | #endif | ||||
#ifndef FDT | |||||
#define MIPS_PIC_XREF 1 /**< unique xref */ | |||||
#endif | |||||
#define INTR_IRQ_NSPC_SWI 4 | #define INTR_IRQ_NSPC_SWI 4 | ||||
/* MIPS32 PIC APIs */ | |||||
int mips_pic_map_fixed_intrs(void); | |||||
int mips_pic_activate_intr(device_t child, struct resource *r); | |||||
int mips_pic_deactivate_intr(device_t child, struct resource *r); | |||||
/* MIPS compatibility for legacy mips code */ | /* MIPS compatibility for legacy mips code */ | ||||
void cpu_init_interrupts(void); | void cpu_init_interrupts(void); | ||||
void cpu_establish_hardintr(const char *, driver_filter_t *, driver_intr_t *, | void cpu_establish_hardintr(const char *, driver_filter_t *, driver_intr_t *, | ||||
void *, int, int, void **); | void *, int, int, void **); | ||||
void cpu_establish_softintr(const char *, driver_filter_t *, void (*)(void*), | void cpu_establish_softintr(const char *, driver_filter_t *, void (*)(void*), | ||||
void *, int, int, void **); | void *, int, int, void **); | ||||
int cpu_create_intr_map(int); | |||||
struct resource *cpu_get_irq_resource(int); | |||||
/* MIPS interrupt C entry point */ | /* MIPS interrupt C entry point */ | ||||
void cpu_intr(struct trapframe *); | void cpu_intr(struct trapframe *); | ||||
#endif /* INTRNG */ | #endif /* INTRNG */ | ||||
#endif /* _MACHINE_INTR_H */ | #endif /* _MACHINE_INTR_H */ |