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head/sys/dev/hwpmc/hwpmc_mips.c
Show First 20 Lines • Show All 98 Lines • ▼ Show 20 Lines | mips_allocate_pmc(int cpu, int ri, struct pmc *pm, | ||||
if ((counter != MIPS_CTR_ALL) && (counter != ri)) | if ((counter != MIPS_CTR_ALL) && (counter != ri)) | ||||
return (EINVAL); | return (EINVAL); | ||||
config = mips_get_perfctl(cpu, ri, event, caps); | config = mips_get_perfctl(cpu, ri, event, caps); | ||||
pm->pm_md.pm_mips_evsel = config; | pm->pm_md.pm_mips_evsel = config; | ||||
PMCDBG(MDP,ALL,2,"mips-allocate ri=%d -> config=0x%x", ri, config); | PMCDBG2(MDP,ALL,2,"mips-allocate ri=%d -> config=0x%x", ri, config); | ||||
return 0; | return 0; | ||||
} | } | ||||
static int | static int | ||||
mips_read_pmc(int cpu, int ri, pmc_value_t *v) | mips_read_pmc(int cpu, int ri, pmc_value_t *v) | ||||
{ | { | ||||
struct pmc *pm; | struct pmc *pm; | ||||
pmc_value_t tmp; | pmc_value_t tmp; | ||||
KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), | KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), | ||||
("[mips,%d] illegal CPU value %d", __LINE__, cpu)); | ("[mips,%d] illegal CPU value %d", __LINE__, cpu)); | ||||
KASSERT(ri >= 0 && ri < mips_npmcs, | KASSERT(ri >= 0 && ri < mips_npmcs, | ||||
("[mips,%d] illegal row index %d", __LINE__, ri)); | ("[mips,%d] illegal row index %d", __LINE__, ri)); | ||||
pm = mips_pcpu[cpu]->pc_mipspmcs[ri].phw_pmc; | pm = mips_pcpu[cpu]->pc_mipspmcs[ri].phw_pmc; | ||||
tmp = mips_pmcn_read(ri); | tmp = mips_pmcn_read(ri); | ||||
PMCDBG(MDP,REA,2,"mips-read id=%d -> %jd", ri, tmp); | PMCDBG2(MDP,REA,2,"mips-read id=%d -> %jd", ri, tmp); | ||||
if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) | if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) | ||||
*v = tmp - (1UL << (mips_pmc_spec.ps_counter_width - 1)); | *v = tmp - (1UL << (mips_pmc_spec.ps_counter_width - 1)); | ||||
else | else | ||||
*v = tmp; | *v = tmp; | ||||
return 0; | return 0; | ||||
} | } | ||||
static int | static int | ||||
mips_write_pmc(int cpu, int ri, pmc_value_t v) | mips_write_pmc(int cpu, int ri, pmc_value_t v) | ||||
{ | { | ||||
struct pmc *pm; | struct pmc *pm; | ||||
KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), | KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), | ||||
("[mips,%d] illegal CPU value %d", __LINE__, cpu)); | ("[mips,%d] illegal CPU value %d", __LINE__, cpu)); | ||||
KASSERT(ri >= 0 && ri < mips_npmcs, | KASSERT(ri >= 0 && ri < mips_npmcs, | ||||
("[mips,%d] illegal row-index %d", __LINE__, ri)); | ("[mips,%d] illegal row-index %d", __LINE__, ri)); | ||||
pm = mips_pcpu[cpu]->pc_mipspmcs[ri].phw_pmc; | pm = mips_pcpu[cpu]->pc_mipspmcs[ri].phw_pmc; | ||||
if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) | if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) | ||||
v = (1UL << (mips_pmc_spec.ps_counter_width - 1)) - v; | v = (1UL << (mips_pmc_spec.ps_counter_width - 1)) - v; | ||||
PMCDBG(MDP,WRI,1,"mips-write cpu=%d ri=%d v=%jx", cpu, ri, v); | PMCDBG3(MDP,WRI,1,"mips-write cpu=%d ri=%d v=%jx", cpu, ri, v); | ||||
mips_pmcn_write(ri, v); | mips_pmcn_write(ri, v); | ||||
return 0; | return 0; | ||||
} | } | ||||
static int | static int | ||||
mips_config_pmc(int cpu, int ri, struct pmc *pm) | mips_config_pmc(int cpu, int ri, struct pmc *pm) | ||||
{ | { | ||||
struct pmc_hw *phw; | struct pmc_hw *phw; | ||||
PMCDBG(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); | PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); | ||||
KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), | KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), | ||||
("[mips,%d] illegal CPU value %d", __LINE__, cpu)); | ("[mips,%d] illegal CPU value %d", __LINE__, cpu)); | ||||
KASSERT(ri >= 0 && ri < mips_npmcs, | KASSERT(ri >= 0 && ri < mips_npmcs, | ||||
("[mips,%d] illegal row-index %d", __LINE__, ri)); | ("[mips,%d] illegal row-index %d", __LINE__, ri)); | ||||
phw = &mips_pcpu[cpu]->pc_mipspmcs[ri]; | phw = &mips_pcpu[cpu]->pc_mipspmcs[ri]; | ||||
▲ Show 20 Lines • Show All 199 Lines • ▼ Show 20 Lines | |||||
{ | { | ||||
int first_ri, i; | int first_ri, i; | ||||
struct pmc_cpu *pc; | struct pmc_cpu *pc; | ||||
struct mips_cpu *pac; | struct mips_cpu *pac; | ||||
struct pmc_hw *phw; | struct pmc_hw *phw; | ||||
KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), | KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), | ||||
("[mips,%d] wrong cpu number %d", __LINE__, cpu)); | ("[mips,%d] wrong cpu number %d", __LINE__, cpu)); | ||||
PMCDBG(MDP,INI,1,"mips-init cpu=%d", cpu); | PMCDBG1(MDP,INI,1,"mips-init cpu=%d", cpu); | ||||
mips_pcpu[cpu] = pac = malloc(sizeof(struct mips_cpu), M_PMC, | mips_pcpu[cpu] = pac = malloc(sizeof(struct mips_cpu), M_PMC, | ||||
M_WAITOK|M_ZERO); | M_WAITOK|M_ZERO); | ||||
pac->pc_mipspmcs = malloc(sizeof(struct pmc_hw) * mips_npmcs, | pac->pc_mipspmcs = malloc(sizeof(struct pmc_hw) * mips_npmcs, | ||||
M_PMC, M_WAITOK|M_ZERO); | M_PMC, M_WAITOK|M_ZERO); | ||||
pc = pmc_pcpu[cpu]; | pc = pmc_pcpu[cpu]; | ||||
first_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_MIPS].pcd_ri; | first_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_MIPS].pcd_ri; | ||||
KASSERT(pc != NULL, ("[mips,%d] NULL per-cpu pointer", __LINE__)); | KASSERT(pc != NULL, ("[mips,%d] NULL per-cpu pointer", __LINE__)); | ||||
Show All 28 Lines | pmc_mips_initialize() | ||||
struct pmc_classdep *pcd; | struct pmc_classdep *pcd; | ||||
/* | /* | ||||
* TODO: Use More bit of PerfCntlX register to detect actual | * TODO: Use More bit of PerfCntlX register to detect actual | ||||
* number of counters | * number of counters | ||||
*/ | */ | ||||
mips_npmcs = 2; | mips_npmcs = 2; | ||||
PMCDBG(MDP,INI,1,"mips-init npmcs=%d", mips_npmcs); | PMCDBG1(MDP,INI,1,"mips-init npmcs=%d", mips_npmcs); | ||||
/* | /* | ||||
* Allocate space for pointers to PMC HW descriptors and for | * Allocate space for pointers to PMC HW descriptors and for | ||||
* the MDEP structure used by MI code. | * the MDEP structure used by MI code. | ||||
*/ | */ | ||||
mips_pcpu = malloc(sizeof(struct mips_cpu *) * pmc_cpu_max(), M_PMC, | mips_pcpu = malloc(sizeof(struct mips_cpu *) * pmc_cpu_max(), M_PMC, | ||||
M_WAITOK|M_ZERO); | M_WAITOK|M_ZERO); | ||||
▲ Show 20 Lines • Show All 375 Lines • Show Last 20 Lines |