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sys/dev/ixl/i40e_nvm.c
/****************************************************************************** | /****************************************************************************** | ||||
Copyright (c) 2013-2014, Intel Corporation | Copyright (c) 2013-2015, Intel Corporation | ||||
All rights reserved. | All rights reserved. | ||||
Redistribution and use in source and binary forms, with or without | Redistribution and use in source and binary forms, with or without | ||||
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sr_size = ((gens & I40E_GLNVM_GENS_SR_SIZE_MASK) >> | sr_size = ((gens & I40E_GLNVM_GENS_SR_SIZE_MASK) >> | ||||
I40E_GLNVM_GENS_SR_SIZE_SHIFT); | I40E_GLNVM_GENS_SR_SIZE_SHIFT); | ||||
/* Switching to words (sr_size contains power of 2KB) */ | /* Switching to words (sr_size contains power of 2KB) */ | ||||
nvm->sr_size = (1 << sr_size) * I40E_SR_WORDS_IN_1KB; | nvm->sr_size = BIT(sr_size) * I40E_SR_WORDS_IN_1KB; | ||||
/* Check if we are in the normal or blank NVM programming mode */ | /* Check if we are in the normal or blank NVM programming mode */ | ||||
fla = rd32(hw, I40E_GLNVM_FLA); | fla = rd32(hw, I40E_GLNVM_FLA); | ||||
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**/ | **/ | ||||
void i40e_release_nvm(struct i40e_hw *hw) | void i40e_release_nvm(struct i40e_hw *hw) | ||||
{ | { | ||||
enum i40e_status_code ret_code = I40E_SUCCESS; | |||||
u32 total_delay = 0; | |||||
DEBUGFUNC("i40e_release_nvm"); | DEBUGFUNC("i40e_release_nvm"); | ||||
if (!hw->nvm.blank_nvm_mode) | if (hw->nvm.blank_nvm_mode) | ||||
i40e_aq_release_resource(hw, I40E_NVM_RESOURCE_ID, 0, NULL); | return; | ||||
ret_code = i40e_aq_release_resource(hw, I40E_NVM_RESOURCE_ID, 0, NULL); | |||||
/* there are some rare cases when trying to release the resource | |||||
* results in an admin Q timeout, so handle them correctly | |||||
*/ | |||||
while ((ret_code == I40E_ERR_ADMIN_QUEUE_TIMEOUT) && | |||||
(total_delay < hw->aq.asq_cmd_timeout)) { | |||||
i40e_msec_delay(1); | |||||
ret_code = i40e_aq_release_resource(hw, | |||||
I40E_NVM_RESOURCE_ID, 0, NULL); | |||||
total_delay++; | |||||
} | |||||
} | } | ||||
/** | /** | ||||
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ret_code = i40e_poll_sr_srctl_done_bit(hw); | ret_code = i40e_poll_sr_srctl_done_bit(hw); | ||||
if (ret_code == I40E_SUCCESS) { | if (ret_code == I40E_SUCCESS) { | ||||
/* Write the address and start reading */ | /* Write the address and start reading */ | ||||
sr_reg = (u32)(offset << I40E_GLNVM_SRCTL_ADDR_SHIFT) | | sr_reg = ((u32)offset << I40E_GLNVM_SRCTL_ADDR_SHIFT) | | ||||
(1 << I40E_GLNVM_SRCTL_START_SHIFT); | BIT(I40E_GLNVM_SRCTL_START_SHIFT); | ||||
wr32(hw, I40E_GLNVM_SRCTL, sr_reg); | wr32(hw, I40E_GLNVM_SRCTL, sr_reg); | ||||
/* Poll I40E_GLNVM_SRCTL until the done bit is set */ | /* Poll I40E_GLNVM_SRCTL until the done bit is set */ | ||||
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bool last_command) | bool last_command) | ||||
{ | { | ||||
enum i40e_status_code ret_code = I40E_ERR_NVM; | enum i40e_status_code ret_code = I40E_ERR_NVM; | ||||
struct i40e_asq_cmd_details cmd_details; | |||||
DEBUGFUNC("i40e_read_nvm_aq"); | DEBUGFUNC("i40e_read_nvm_aq"); | ||||
memset(&cmd_details, 0, sizeof(cmd_details)); | |||||
cmd_details.wb_desc = &hw->nvm_wb_desc; | |||||
/* Here we are checking the SR limit only for the flat memory model. | /* Here we are checking the SR limit only for the flat memory model. | ||||
* We cannot do it for the module-based model, as we did not acquire | * We cannot do it for the module-based model, as we did not acquire | ||||
* the NVM resource yet (we cannot get the module pointer value). | * the NVM resource yet (we cannot get the module pointer value). | ||||
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ret_code = i40e_aq_read_nvm(hw, module_pointer, | ret_code = i40e_aq_read_nvm(hw, module_pointer, | ||||
2 * offset, /*bytes*/ | 2 * offset, /*bytes*/ | ||||
2 * words, /*bytes*/ | 2 * words, /*bytes*/ | ||||
data, last_command, NULL); | data, last_command, &cmd_details); | ||||
return ret_code; | return ret_code; | ||||
} | } | ||||
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bool last_command) | bool last_command) | ||||
{ | { | ||||
enum i40e_status_code ret_code = I40E_ERR_NVM; | enum i40e_status_code ret_code = I40E_ERR_NVM; | ||||
struct i40e_asq_cmd_details cmd_details; | |||||
DEBUGFUNC("i40e_write_nvm_aq"); | DEBUGFUNC("i40e_write_nvm_aq"); | ||||
memset(&cmd_details, 0, sizeof(cmd_details)); | |||||
cmd_details.wb_desc = &hw->nvm_wb_desc; | |||||
/* Here we are checking the SR limit only for the flat memory model. | /* Here we are checking the SR limit only for the flat memory model. | ||||
* We cannot do it for the module-based model, as we did not acquire | * We cannot do it for the module-based model, as we did not acquire | ||||
* the NVM resource yet (we cannot get the module pointer value). | * the NVM resource yet (we cannot get the module pointer value). | ||||
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ret_code = i40e_aq_update_nvm(hw, module_pointer, | ret_code = i40e_aq_update_nvm(hw, module_pointer, | ||||
2 * offset, /*bytes*/ | 2 * offset, /*bytes*/ | ||||
2 * words, /*bytes*/ | 2 * words, /*bytes*/ | ||||
data, last_command, NULL); | data, last_command, &cmd_details); | ||||
return ret_code; | return ret_code; | ||||
} | } | ||||
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/* Read SR page */ | /* Read SR page */ | ||||
if ((i % I40E_SR_SECTOR_SIZE_IN_WORDS) == 0) { | if ((i % I40E_SR_SECTOR_SIZE_IN_WORDS) == 0) { | ||||
u16 words = I40E_SR_SECTOR_SIZE_IN_WORDS; | u16 words = I40E_SR_SECTOR_SIZE_IN_WORDS; | ||||
ret_code = i40e_read_nvm_buffer(hw, i, &words, data); | ret_code = i40e_read_nvm_buffer(hw, i, &words, data); | ||||
if (ret_code != I40E_SUCCESS) { | if (ret_code != I40E_SUCCESS) { | ||||
ret_code = I40E_ERR_NVM_CHECKSUM; | ret_code = I40E_ERR_NVM_CHECKSUM; | ||||
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{ | { | ||||
enum i40e_status_code ret_code = I40E_SUCCESS; | enum i40e_status_code ret_code = I40E_SUCCESS; | ||||
u16 checksum; | u16 checksum; | ||||
__le16 le_sum; | |||||
DEBUGFUNC("i40e_update_nvm_checksum"); | DEBUGFUNC("i40e_update_nvm_checksum"); | ||||
ret_code = i40e_calc_nvm_checksum(hw, &checksum); | ret_code = i40e_calc_nvm_checksum(hw, &checksum); | ||||
le_sum = CPU_TO_LE16(checksum); | |||||
if (ret_code == I40E_SUCCESS) | if (ret_code == I40E_SUCCESS) | ||||
ret_code = i40e_write_nvm_aq(hw, 0x00, I40E_SR_SW_CHECKSUM_WORD, | ret_code = i40e_write_nvm_aq(hw, 0x00, I40E_SR_SW_CHECKSUM_WORD, | ||||
1, &checksum, TRUE); | 1, &le_sum, TRUE); | ||||
return ret_code; | return ret_code; | ||||
} | } | ||||
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