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sys/dev/ixl/i40e_hmc.c
/****************************************************************************** | /****************************************************************************** | ||||
Copyright (c) 2013-2014, Intel Corporation | Copyright (c) 2013-2015, Intel Corporation | ||||
All rights reserved. | All rights reserved. | ||||
Redistribution and use in source and binary forms, with or without | Redistribution and use in source and binary forms, with or without | ||||
Context not available. | |||||
* @hw: pointer to our HW structure | * @hw: pointer to our HW structure | ||||
* @hmc_info: pointer to the HMC configuration information structure | * @hmc_info: pointer to the HMC configuration information structure | ||||
* @pd_index: which page descriptor index to manipulate | * @pd_index: which page descriptor index to manipulate | ||||
* @rsrc_pg: if not NULL, use preallocated page instead of allocating new one. | |||||
* | * | ||||
* This function: | * This function: | ||||
* 1. Initializes the pd entry | * 1. Initializes the pd entry | ||||
Context not available. | |||||
**/ | **/ | ||||
enum i40e_status_code i40e_add_pd_table_entry(struct i40e_hw *hw, | enum i40e_status_code i40e_add_pd_table_entry(struct i40e_hw *hw, | ||||
struct i40e_hmc_info *hmc_info, | struct i40e_hmc_info *hmc_info, | ||||
u32 pd_index) | u32 pd_index, | ||||
struct i40e_dma_mem *rsrc_pg) | |||||
{ | { | ||||
enum i40e_status_code ret_code = I40E_SUCCESS; | enum i40e_status_code ret_code = I40E_SUCCESS; | ||||
struct i40e_hmc_pd_table *pd_table; | struct i40e_hmc_pd_table *pd_table; | ||||
struct i40e_hmc_pd_entry *pd_entry; | struct i40e_hmc_pd_entry *pd_entry; | ||||
struct i40e_dma_mem mem; | struct i40e_dma_mem mem; | ||||
struct i40e_dma_mem *page = &mem; | |||||
u32 sd_idx, rel_pd_idx; | u32 sd_idx, rel_pd_idx; | ||||
u64 *pd_addr; | u64 *pd_addr; | ||||
u64 page_desc; | u64 page_desc; | ||||
Context not available. | |||||
pd_table = &hmc_info->sd_table.sd_entry[sd_idx].u.pd_table; | pd_table = &hmc_info->sd_table.sd_entry[sd_idx].u.pd_table; | ||||
pd_entry = &pd_table->pd_entry[rel_pd_idx]; | pd_entry = &pd_table->pd_entry[rel_pd_idx]; | ||||
if (!pd_entry->valid) { | if (!pd_entry->valid) { | ||||
/* allocate a 4K backing page */ | if (rsrc_pg) { | ||||
ret_code = i40e_allocate_dma_mem(hw, &mem, i40e_mem_bp, | pd_entry->rsrc_pg = TRUE; | ||||
I40E_HMC_PAGED_BP_SIZE, | page = rsrc_pg; | ||||
I40E_HMC_PD_BP_BUF_ALIGNMENT); | } else { | ||||
if (ret_code) | /* allocate a 4K backing page */ | ||||
goto exit; | ret_code = i40e_allocate_dma_mem(hw, page, i40e_mem_bp, | ||||
I40E_HMC_PAGED_BP_SIZE, | |||||
I40E_HMC_PD_BP_BUF_ALIGNMENT); | |||||
if (ret_code) | |||||
goto exit; | |||||
pd_entry->rsrc_pg = FALSE; | |||||
} | |||||
i40e_memcpy(&pd_entry->bp.addr, &mem, | i40e_memcpy(&pd_entry->bp.addr, page, | ||||
sizeof(struct i40e_dma_mem), I40E_NONDMA_TO_NONDMA); | sizeof(struct i40e_dma_mem), I40E_NONDMA_TO_NONDMA); | ||||
pd_entry->bp.sd_pd_index = pd_index; | pd_entry->bp.sd_pd_index = pd_index; | ||||
pd_entry->bp.entry_type = I40E_SD_TYPE_PAGED; | pd_entry->bp.entry_type = I40E_SD_TYPE_PAGED; | ||||
/* Set page address and valid bit */ | /* Set page address and valid bit */ | ||||
page_desc = mem.pa | 0x1; | page_desc = page->pa | 0x1; | ||||
pd_addr = (u64 *)pd_table->pd_page_addr.va; | pd_addr = (u64 *)pd_table->pd_page_addr.va; | ||||
pd_addr += rel_pd_idx; | pd_addr += rel_pd_idx; | ||||
Context not available. | |||||
I40E_INVALIDATE_PF_HMC_PD(hw, sd_idx, idx); | I40E_INVALIDATE_PF_HMC_PD(hw, sd_idx, idx); | ||||
/* free memory here */ | /* free memory here */ | ||||
ret_code = i40e_free_dma_mem(hw, &(pd_entry->bp.addr)); | if (!pd_entry->rsrc_pg) | ||||
ret_code = i40e_free_dma_mem(hw, &(pd_entry->bp.addr)); | |||||
if (I40E_SUCCESS != ret_code) | if (I40E_SUCCESS != ret_code) | ||||
goto exit; | goto exit; | ||||
if (!pd_table->ref_cnt) | if (!pd_table->ref_cnt) | ||||
Context not available. |