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Show First 20 Lines • Show All 796 Lines • ▼ Show 20 Lines	svm_handle_inst_emul(struct vmcb vmcb, uint64_t gpa, struct vm_exit vmexit)

error = vmcb_seg(vmcb, VM_REG_GUEST_CS, &seg);		error = vmcb_seg(vmcb, VM_REG_GUEST_CS, &seg);
KASSERT(error == 0, ("%s: vmcb_seg(CS) error %d", __func__, error));		KASSERT(error == 0, ("%s: vmcb_seg(CS) error %d", __func__, error));

switch(paging->cpu_mode) {		switch(paging->cpu_mode) {
case CPU_MODE_REAL:		case CPU_MODE_REAL:
vmexit->u.inst_emul.cs_base = seg.base;		vmexit->u.inst_emul.cs_base = seg.base;
vmexit->u.inst_emul.cs_d = 0;		vmexit->u.inst_emul.cs_d = 0;
		break;
case CPU_MODE_PROTECTED:		case CPU_MODE_PROTECTED:
case CPU_MODE_COMPATIBILITY:		case CPU_MODE_COMPATIBILITY:
vmexit->u.inst_emul.cs_base = seg.base;		vmexit->u.inst_emul.cs_base = seg.base;

/*		/*
* Section 4.8.1 of APM2, Default Operand Size or D bit.		* Section 4.8.1 of APM2, Default Operand Size or D bit.
*/		*/
vmexit->u.inst_emul.cs_d = (seg.attrib & VMCB_CS_ATTRIB_D) ?		vmexit->u.inst_emul.cs_d = (seg.attrib & VMCB_CS_ATTRIB_D) ?
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