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sys/x86/iommu/intel_quirks.c
/*- | /*- | ||||
* Copyright (c) 2013 The FreeBSD Foundation | * Copyright (c) 2013, 2015 The FreeBSD Foundation | ||||
* All rights reserved. | * All rights reserved. | ||||
* | * | ||||
* This software was developed by Konstantin Belousov <kib@FreeBSD.org> | * This software was developed by Konstantin Belousov <kib@FreeBSD.org> | ||||
* under sponsorship from the FreeBSD Foundation. | * under sponsorship from the FreeBSD Foundation. | ||||
* | * | ||||
* Redistribution and use in source and binary forms, with or without | * Redistribution and use in source and binary forms, with or without | ||||
* modification, are permitted provided that the following conditions | * modification, are permitted provided that the following conditions | ||||
* are met: | * are met: | ||||
Show All 26 Lines | |||||
#include <sys/malloc.h> | #include <sys/malloc.h> | ||||
#include <sys/memdesc.h> | #include <sys/memdesc.h> | ||||
#include <sys/module.h> | #include <sys/module.h> | ||||
#include <sys/rman.h> | #include <sys/rman.h> | ||||
#include <sys/rwlock.h> | #include <sys/rwlock.h> | ||||
#include <sys/smp.h> | #include <sys/smp.h> | ||||
#include <sys/taskqueue.h> | #include <sys/taskqueue.h> | ||||
#include <sys/tree.h> | #include <sys/tree.h> | ||||
#include <sys/vmem.h> | |||||
#include <machine/bus.h> | #include <machine/bus.h> | ||||
#include <contrib/dev/acpica/include/acpi.h> | #include <contrib/dev/acpica/include/acpi.h> | ||||
#include <contrib/dev/acpica/include/accommon.h> | #include <contrib/dev/acpica/include/accommon.h> | ||||
#include <dev/acpica/acpivar.h> | #include <dev/acpica/acpivar.h> | ||||
#include <vm/vm.h> | #include <vm/vm.h> | ||||
#include <vm/vm_extern.h> | #include <vm/vm_extern.h> | ||||
#include <vm/vm_kern.h> | #include <vm/vm_kern.h> | ||||
#include <vm/vm_object.h> | #include <vm/vm_object.h> | ||||
#include <vm/vm_page.h> | #include <vm/vm_page.h> | ||||
#include <vm/vm_pager.h> | #include <vm/vm_pager.h> | ||||
#include <vm/vm_map.h> | #include <vm/vm_map.h> | ||||
#include <x86/include/busdma_impl.h> | #include <x86/include/busdma_impl.h> | ||||
#include <x86/iommu/intel_reg.h> | #include <x86/iommu/intel_reg.h> | ||||
#include <x86/iommu/busdma_dmar.h> | #include <x86/iommu/busdma_dmar.h> | ||||
#include <x86/iommu/intel_dmar.h> | #include <x86/iommu/intel_dmar.h> | ||||
#include <dev/pci/pcivar.h> | #include <dev/pci/pcivar.h> | ||||
typedef void (*dmar_quirk_fun)(struct dmar_unit *); | typedef void (*dmar_quirk_cpu_fun)(struct dmar_unit *); | ||||
struct intel_dmar_quirk_cpu { | struct intel_dmar_quirk_cpu { | ||||
u_int ext_family; | u_int ext_family; | ||||
u_int ext_model; | u_int ext_model; | ||||
u_int family_code; | u_int family_code; | ||||
u_int model; | u_int model; | ||||
u_int stepping; | u_int stepping; | ||||
dmar_quirk_fun quirk; | dmar_quirk_cpu_fun quirk; | ||||
const char *descr; | const char *descr; | ||||
}; | }; | ||||
typedef void (*dmar_quirk_nb_fun)(struct dmar_unit *, device_t nb); | |||||
struct intel_dmar_quirk_nb { | struct intel_dmar_quirk_nb { | ||||
u_int dev_id; | u_int dev_id; | ||||
u_int rev_no; | u_int rev_no; | ||||
dmar_quirk_fun quirk; | dmar_quirk_nb_fun quirk; | ||||
const char *descr; | const char *descr; | ||||
}; | }; | ||||
#define QUIRK_NB_ALL_REV 0xffffffff | |||||
static void | static void | ||||
dmar_match_quirks(struct dmar_unit *dmar, | dmar_match_quirks(struct dmar_unit *dmar, | ||||
const struct intel_dmar_quirk_nb *nb_quirks, int nb_quirks_len, | const struct intel_dmar_quirk_nb *nb_quirks, int nb_quirks_len, | ||||
const struct intel_dmar_quirk_cpu *cpu_quirks, int cpu_quirks_len) | const struct intel_dmar_quirk_cpu *cpu_quirks, int cpu_quirks_len) | ||||
{ | { | ||||
device_t nb; | device_t nb; | ||||
const struct intel_dmar_quirk_nb *nb_quirk; | const struct intel_dmar_quirk_nb *nb_quirk; | ||||
const struct intel_dmar_quirk_cpu *cpu_quirk; | const struct intel_dmar_quirk_cpu *cpu_quirk; | ||||
u_int p[4]; | u_int p[4]; | ||||
u_int dev_id, rev_no; | u_int dev_id, rev_no; | ||||
u_int ext_family, ext_model, family_code, model, stepping; | u_int ext_family, ext_model, family_code, model, stepping; | ||||
int i; | int i; | ||||
if (nb_quirks != NULL) { | if (nb_quirks != NULL) { | ||||
nb = pci_find_bsf(0, 0, 0); | nb = pci_find_bsf(0, 0, 0); | ||||
if (nb != NULL) { | if (nb != NULL) { | ||||
dev_id = pci_get_device(nb); | dev_id = pci_get_device(nb); | ||||
rev_no = pci_get_revid(nb); | rev_no = pci_get_revid(nb); | ||||
for (i = 0; i < nb_quirks_len; i++) { | for (i = 0; i < nb_quirks_len; i++) { | ||||
nb_quirk = &nb_quirks[i]; | nb_quirk = &nb_quirks[i]; | ||||
if (nb_quirk->dev_id == dev_id && | if (nb_quirk->dev_id == dev_id && | ||||
nb_quirk->rev_no == rev_no) { | (nb_quirk->rev_no == rev_no || | ||||
nb_quirk->rev_no == QUIRK_NB_ALL_REV)) { | |||||
if (bootverbose) { | if (bootverbose) { | ||||
device_printf(dmar->dev, | device_printf(dmar->dev, | ||||
"NB IOMMU quirk %s\n", | "NB IOMMU quirk %s\n", | ||||
nb_quirk->descr); | nb_quirk->descr); | ||||
} | } | ||||
nb_quirk->quirk(dmar); | nb_quirk->quirk(dmar, nb); | ||||
} | } | ||||
} | } | ||||
} else { | } else { | ||||
device_printf(dmar->dev, "cannot find northbridge\n"); | device_printf(dmar->dev, "cannot find northbridge\n"); | ||||
} | } | ||||
} | } | ||||
if (cpu_quirks != NULL) { | if (cpu_quirks != NULL) { | ||||
do_cpuid(1, p); | do_cpuid(1, p); | ||||
Show All 17 Lines | for (i = 0; i < cpu_quirks_len; i++) { | ||||
} | } | ||||
cpu_quirk->quirk(dmar); | cpu_quirk->quirk(dmar); | ||||
} | } | ||||
} | } | ||||
} | } | ||||
} | } | ||||
static void | static void | ||||
nb_5400_no_low_high_prot_mem(struct dmar_unit *unit) | nb_5400_no_low_high_prot_mem(struct dmar_unit *unit, device_t nb __unused) | ||||
{ | { | ||||
unit->hw_cap &= ~(DMAR_CAP_PHMR | DMAR_CAP_PLMR); | unit->hw_cap &= ~(DMAR_CAP_PHMR | DMAR_CAP_PLMR); | ||||
} | } | ||||
static void | |||||
nb_no_ir(struct dmar_unit *unit, device_t nb __unused) | |||||
{ | |||||
unit->hw_ecap &= ~(DMAR_ECAP_IR | DMAR_ECAP_EIM); | |||||
} | |||||
static void | |||||
nb_5500_no_ir_rev13(struct dmar_unit *unit, device_t nb) | |||||
{ | |||||
u_int rev_no; | |||||
rev_no = pci_get_revid(nb); | |||||
if (rev_no <= 0x13) | |||||
nb_no_ir(unit, nb); | |||||
} | |||||
static const struct intel_dmar_quirk_nb pre_use_nb[] = { | static const struct intel_dmar_quirk_nb pre_use_nb[] = { | ||||
{ | { | ||||
.dev_id = 0x4001, .rev_no = 0x20, | .dev_id = 0x4001, .rev_no = 0x20, | ||||
.quirk = nb_5400_no_low_high_prot_mem, | .quirk = nb_5400_no_low_high_prot_mem, | ||||
.descr = "5400 E23" /* no low/high protected memory */ | .descr = "5400 E23" /* no low/high protected memory */ | ||||
}, | }, | ||||
{ | { | ||||
.dev_id = 0x4003, .rev_no = 0x20, | .dev_id = 0x4003, .rev_no = 0x20, | ||||
.quirk = nb_5400_no_low_high_prot_mem, | .quirk = nb_5400_no_low_high_prot_mem, | ||||
.descr = "5400 E23" /* no low/high protected memory */ | .descr = "5400 E23" /* no low/high protected memory */ | ||||
}, | |||||
{ | |||||
.dev_id = 0x3403, .rev_no = QUIRK_NB_ALL_REV, | |||||
.quirk = nb_5500_no_ir_rev13, | |||||
.descr = "5500 E47, E53" /* interrupt remapping does not work */ | |||||
}, | |||||
{ | |||||
.dev_id = 0x3405, .rev_no = QUIRK_NB_ALL_REV, | |||||
.quirk = nb_5500_no_ir_rev13, | |||||
.descr = "5500 E47, E53" /* interrupt remapping does not work */ | |||||
}, | |||||
{ | |||||
.dev_id = 0x3405, .rev_no = 0x22, | |||||
.quirk = nb_no_ir, | |||||
.descr = "5500 E47, E53" /* interrupt remapping does not work */ | |||||
}, | |||||
{ | |||||
.dev_id = 0x3406, .rev_no = QUIRK_NB_ALL_REV, | |||||
.quirk = nb_5500_no_ir_rev13, | |||||
.descr = "5500 E47, E53" /* interrupt remapping does not work */ | |||||
}, | }, | ||||
}; | }; | ||||
static void | static void | ||||
cpu_e5_am9(struct dmar_unit *unit) | cpu_e5_am9(struct dmar_unit *unit) | ||||
{ | { | ||||
unit->hw_cap &= ~(0x3fULL << 48); | unit->hw_cap &= ~(0x3fULL << 48); | ||||
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