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sys/dev/e1000/e1000_ich8lan.c
Show First 20 Lines • Show All 688 Lines • ▼ Show 20 Lines | static s32 e1000_init_nvm_params_ich8lan(struct e1000_hw *hw) | ||||
nvm->word_size = E1000_SHADOW_RAM_WORDS; | nvm->word_size = E1000_SHADOW_RAM_WORDS; | ||||
/* Clear shadow ram */ | /* Clear shadow ram */ | ||||
for (i = 0; i < nvm->word_size; i++) { | for (i = 0; i < nvm->word_size; i++) { | ||||
dev_spec->shadow_ram[i].modified = FALSE; | dev_spec->shadow_ram[i].modified = FALSE; | ||||
dev_spec->shadow_ram[i].value = 0xFFFF; | dev_spec->shadow_ram[i].value = 0xFFFF; | ||||
} | } | ||||
E1000_MUTEX_INIT(&dev_spec->nvm_mutex); | |||||
E1000_MUTEX_INIT(&dev_spec->swflag_mutex); | |||||
/* Function Pointers */ | /* Function Pointers */ | ||||
nvm->ops.acquire = e1000_acquire_nvm_ich8lan; | nvm->ops.acquire = e1000_acquire_nvm_ich8lan; | ||||
nvm->ops.release = e1000_release_nvm_ich8lan; | nvm->ops.release = e1000_release_nvm_ich8lan; | ||||
if (hw->mac.type >= e1000_pch_spt) { | if (hw->mac.type >= e1000_pch_spt) { | ||||
nvm->ops.read = e1000_read_nvm_spt; | nvm->ops.read = e1000_read_nvm_spt; | ||||
nvm->ops.update = e1000_update_nvm_checksum_spt; | nvm->ops.update = e1000_update_nvm_checksum_spt; | ||||
} else { | } else { | ||||
nvm->ops.read = e1000_read_nvm_ich8lan; | nvm->ops.read = e1000_read_nvm_ich8lan; | ||||
▲ Show 20 Lines • Show All 1,134 Lines • ▼ Show 20 Lines | |||||
* @hw: pointer to the HW structure | * @hw: pointer to the HW structure | ||||
* | * | ||||
* Acquires the mutex for performing NVM operations. | * Acquires the mutex for performing NVM operations. | ||||
**/ | **/ | ||||
static s32 e1000_acquire_nvm_ich8lan(struct e1000_hw *hw) | static s32 e1000_acquire_nvm_ich8lan(struct e1000_hw *hw) | ||||
{ | { | ||||
DEBUGFUNC("e1000_acquire_nvm_ich8lan"); | DEBUGFUNC("e1000_acquire_nvm_ich8lan"); | ||||
E1000_MUTEX_LOCK(&hw->dev_spec.ich8lan.nvm_mutex); | ASSERT_CTX_LOCK_HELD(hw); | ||||
return E1000_SUCCESS; | return E1000_SUCCESS; | ||||
} | } | ||||
/** | /** | ||||
* e1000_release_nvm_ich8lan - Release NVM mutex | * e1000_release_nvm_ich8lan - Release NVM mutex | ||||
* @hw: pointer to the HW structure | * @hw: pointer to the HW structure | ||||
* | * | ||||
* Releases the mutex used while performing NVM operations. | * Releases the mutex used while performing NVM operations. | ||||
**/ | **/ | ||||
static void e1000_release_nvm_ich8lan(struct e1000_hw *hw) | static void e1000_release_nvm_ich8lan(struct e1000_hw *hw) | ||||
{ | { | ||||
DEBUGFUNC("e1000_release_nvm_ich8lan"); | DEBUGFUNC("e1000_release_nvm_ich8lan"); | ||||
E1000_MUTEX_UNLOCK(&hw->dev_spec.ich8lan.nvm_mutex); | ASSERT_CTX_LOCK_HELD(hw); | ||||
return; | |||||
} | } | ||||
/** | /** | ||||
* e1000_acquire_swflag_ich8lan - Acquire software control flag | * e1000_acquire_swflag_ich8lan - Acquire software control flag | ||||
* @hw: pointer to the HW structure | * @hw: pointer to the HW structure | ||||
* | * | ||||
* Acquires the software control flag for performing PHY and select | * Acquires the software control flag for performing PHY and select | ||||
* MAC CSR accesses. | * MAC CSR accesses. | ||||
**/ | **/ | ||||
static s32 e1000_acquire_swflag_ich8lan(struct e1000_hw *hw) | static s32 e1000_acquire_swflag_ich8lan(struct e1000_hw *hw) | ||||
{ | { | ||||
u32 extcnf_ctrl, timeout = PHY_CFG_TIMEOUT; | u32 extcnf_ctrl, timeout = PHY_CFG_TIMEOUT; | ||||
s32 ret_val = E1000_SUCCESS; | s32 ret_val = E1000_SUCCESS; | ||||
DEBUGFUNC("e1000_acquire_swflag_ich8lan"); | DEBUGFUNC("e1000_acquire_swflag_ich8lan"); | ||||
E1000_MUTEX_LOCK(&hw->dev_spec.ich8lan.swflag_mutex); | ASSERT_CTX_LOCK_HELD(hw); | ||||
while (timeout) { | while (timeout) { | ||||
extcnf_ctrl = E1000_READ_REG(hw, E1000_EXTCNF_CTRL); | extcnf_ctrl = E1000_READ_REG(hw, E1000_EXTCNF_CTRL); | ||||
if (!(extcnf_ctrl & E1000_EXTCNF_CTRL_SWFLAG)) | if (!(extcnf_ctrl & E1000_EXTCNF_CTRL_SWFLAG)) | ||||
break; | break; | ||||
msec_delay_irq(1); | msec_delay_irq(1); | ||||
timeout--; | timeout--; | ||||
Show All 24 Lines | DEBUGOUT2("Failed to acquire the semaphore, FW or HW has it: FWSM=0x%8.8x EXTCNF_CTRL=0x%8.8x)\n", | ||||
E1000_READ_REG(hw, E1000_FWSM), extcnf_ctrl); | E1000_READ_REG(hw, E1000_FWSM), extcnf_ctrl); | ||||
extcnf_ctrl &= ~E1000_EXTCNF_CTRL_SWFLAG; | extcnf_ctrl &= ~E1000_EXTCNF_CTRL_SWFLAG; | ||||
E1000_WRITE_REG(hw, E1000_EXTCNF_CTRL, extcnf_ctrl); | E1000_WRITE_REG(hw, E1000_EXTCNF_CTRL, extcnf_ctrl); | ||||
ret_val = -E1000_ERR_CONFIG; | ret_val = -E1000_ERR_CONFIG; | ||||
goto out; | goto out; | ||||
} | } | ||||
out: | out: | ||||
if (ret_val) | |||||
E1000_MUTEX_UNLOCK(&hw->dev_spec.ich8lan.swflag_mutex); | |||||
return ret_val; | return ret_val; | ||||
} | } | ||||
/** | /** | ||||
* e1000_release_swflag_ich8lan - Release software control flag | * e1000_release_swflag_ich8lan - Release software control flag | ||||
* @hw: pointer to the HW structure | * @hw: pointer to the HW structure | ||||
* | * | ||||
* Releases the software control flag for performing PHY and select | * Releases the software control flag for performing PHY and select | ||||
* MAC CSR accesses. | * MAC CSR accesses. | ||||
**/ | **/ | ||||
static void e1000_release_swflag_ich8lan(struct e1000_hw *hw) | static void e1000_release_swflag_ich8lan(struct e1000_hw *hw) | ||||
{ | { | ||||
u32 extcnf_ctrl; | u32 extcnf_ctrl; | ||||
DEBUGFUNC("e1000_release_swflag_ich8lan"); | DEBUGFUNC("e1000_release_swflag_ich8lan"); | ||||
extcnf_ctrl = E1000_READ_REG(hw, E1000_EXTCNF_CTRL); | extcnf_ctrl = E1000_READ_REG(hw, E1000_EXTCNF_CTRL); | ||||
if (extcnf_ctrl & E1000_EXTCNF_CTRL_SWFLAG) { | if (extcnf_ctrl & E1000_EXTCNF_CTRL_SWFLAG) { | ||||
extcnf_ctrl &= ~E1000_EXTCNF_CTRL_SWFLAG; | extcnf_ctrl &= ~E1000_EXTCNF_CTRL_SWFLAG; | ||||
E1000_WRITE_REG(hw, E1000_EXTCNF_CTRL, extcnf_ctrl); | E1000_WRITE_REG(hw, E1000_EXTCNF_CTRL, extcnf_ctrl); | ||||
} else { | } else { | ||||
DEBUGOUT("Semaphore unexpectedly released by sw/fw/hw\n"); | DEBUGOUT("Semaphore unexpectedly released by sw/fw/hw\n"); | ||||
} | } | ||||
E1000_MUTEX_UNLOCK(&hw->dev_spec.ich8lan.swflag_mutex); | |||||
return; | |||||
} | } | ||||
/** | /** | ||||
* e1000_check_mng_mode_ich8lan - Checks management mode | * e1000_check_mng_mode_ich8lan - Checks management mode | ||||
* @hw: pointer to the HW structure | * @hw: pointer to the HW structure | ||||
* | * | ||||
* This checks if the adapter has any manageability enabled. | * This checks if the adapter has any manageability enabled. | ||||
* This is a function pointer entry point only called by read/write | * This is a function pointer entry point only called by read/write | ||||
▲ Show 20 Lines • Show All 3,053 Lines • ▼ Show 20 Lines | static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw) | ||||
/* Set Phy Config Counter to 50msec */ | /* Set Phy Config Counter to 50msec */ | ||||
if (hw->mac.type == e1000_pch2lan) { | if (hw->mac.type == e1000_pch2lan) { | ||||
reg = E1000_READ_REG(hw, E1000_FEXTNVM3); | reg = E1000_READ_REG(hw, E1000_FEXTNVM3); | ||||
reg &= ~E1000_FEXTNVM3_PHY_CFG_COUNTER_MASK; | reg &= ~E1000_FEXTNVM3_PHY_CFG_COUNTER_MASK; | ||||
reg |= E1000_FEXTNVM3_PHY_CFG_COUNTER_50MSEC; | reg |= E1000_FEXTNVM3_PHY_CFG_COUNTER_50MSEC; | ||||
E1000_WRITE_REG(hw, E1000_FEXTNVM3, reg); | E1000_WRITE_REG(hw, E1000_FEXTNVM3, reg); | ||||
} | } | ||||
if (!ret_val) | |||||
E1000_MUTEX_UNLOCK(&hw->dev_spec.ich8lan.swflag_mutex); | |||||
if (ctrl & E1000_CTRL_PHY_RST) { | if (ctrl & E1000_CTRL_PHY_RST) { | ||||
ret_val = hw->phy.ops.get_cfg_done(hw); | ret_val = hw->phy.ops.get_cfg_done(hw); | ||||
if (ret_val) | if (ret_val) | ||||
return ret_val; | return ret_val; | ||||
ret_val = e1000_post_phy_reset_ich8lan(hw); | ret_val = e1000_post_phy_reset_ich8lan(hw); | ||||
if (ret_val) | if (ret_val) | ||||
▲ Show 20 Lines • Show All 1,076 Lines • Show Last 20 Lines |