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head/sys/dev/bnxt/bnxt_hwrm.c
Show All 24 Lines | |||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF | ||||
* THE POSSIBILITY OF SUCH DAMAGE. | * THE POSSIBILITY OF SUCH DAMAGE. | ||||
*/ | */ | ||||
#include <sys/cdefs.h> | #include <sys/cdefs.h> | ||||
__FBSDID("$FreeBSD$"); | __FBSDID("$FreeBSD$"); | ||||
#include <sys/endian.h> | #include <sys/endian.h> | ||||
#include <sys/bitstring.h> | |||||
#include "bnxt.h" | #include "bnxt.h" | ||||
#include "bnxt_hwrm.h" | #include "bnxt_hwrm.h" | ||||
#include "hsi_struct_def.h" | #include "hsi_struct_def.h" | ||||
static int bnxt_hwrm_err_map(uint16_t err); | static int bnxt_hwrm_err_map(uint16_t err); | ||||
static inline int _is_valid_ether_addr(uint8_t *); | static inline int _is_valid_ether_addr(uint8_t *); | ||||
static inline void get_random_ether_addr(uint8_t *); | static inline void get_random_ether_addr(uint8_t *); | ||||
▲ Show 20 Lines • Show All 1,501 Lines • ▼ Show 20 Lines | bnxt_hwrm_free_wol_fltr(struct bnxt_softc *softc) | ||||
bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_WOL_FILTER_FREE); | bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_WOL_FILTER_FREE); | ||||
req.port_id = htole16(softc->pf.port_id); | req.port_id = htole16(softc->pf.port_id); | ||||
req.enables = | req.enables = | ||||
htole32(HWRM_WOL_FILTER_FREE_INPUT_ENABLES_WOL_FILTER_ID); | htole32(HWRM_WOL_FILTER_FREE_INPUT_ENABLES_WOL_FILTER_ID); | ||||
req.wol_filter_id = softc->wol_filter_id; | req.wol_filter_id = softc->wol_filter_id; | ||||
return hwrm_send_message(softc, &req, sizeof(req)); | return hwrm_send_message(softc, &req, sizeof(req)); | ||||
} | } | ||||
static void bnxt_hwrm_set_coal_params(struct bnxt_softc *softc, uint32_t max_frames, | |||||
uint32_t buf_tmrs, uint16_t flags, | |||||
struct hwrm_ring_cmpl_ring_cfg_aggint_params_input *req) | |||||
{ | |||||
req->flags = htole16(flags); | |||||
req->num_cmpl_dma_aggr = htole16((uint16_t)max_frames); | |||||
req->num_cmpl_dma_aggr_during_int = htole16(max_frames >> 16); | |||||
req->cmpl_aggr_dma_tmr = htole16((uint16_t)buf_tmrs); | |||||
req->cmpl_aggr_dma_tmr_during_int = htole16(buf_tmrs >> 16); | |||||
/* Minimum time between 2 interrupts set to buf_tmr x 2 */ | |||||
req->int_lat_tmr_min = htole16((uint16_t)buf_tmrs * 2); | |||||
req->int_lat_tmr_max = htole16((uint16_t)buf_tmrs * 4); | |||||
req->num_cmpl_aggr_int = htole16((uint16_t)max_frames * 4); | |||||
} | |||||
int bnxt_hwrm_set_coal(struct bnxt_softc *softc) | |||||
{ | |||||
int i, rc = 0; | |||||
struct hwrm_ring_cmpl_ring_cfg_aggint_params_input req_rx = {0}, | |||||
req_tx = {0}, *req; | |||||
uint16_t max_buf, max_buf_irq; | |||||
uint16_t buf_tmr, buf_tmr_irq; | |||||
uint32_t flags; | |||||
bnxt_hwrm_cmd_hdr_init(softc, &req_rx, | |||||
HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS); | |||||
bnxt_hwrm_cmd_hdr_init(softc, &req_tx, | |||||
HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS); | |||||
/* Each rx completion (2 records) should be DMAed immediately. | |||||
* DMA 1/4 of the completion buffers at a time. | |||||
*/ | |||||
max_buf = min_t(uint16_t, softc->rx_coal_frames / 4, 2); | |||||
/* max_buf must not be zero */ | |||||
max_buf = clamp_t(uint16_t, max_buf, 1, 63); | |||||
max_buf_irq = clamp_t(uint16_t, softc->rx_coal_frames_irq, 1, 63); | |||||
buf_tmr = BNXT_USEC_TO_COAL_TIMER(softc->rx_coal_usecs); | |||||
/* buf timer set to 1/4 of interrupt timer */ | |||||
buf_tmr = max_t(uint16_t, buf_tmr / 4, 1); | |||||
buf_tmr_irq = BNXT_USEC_TO_COAL_TIMER(softc->rx_coal_usecs_irq); | |||||
buf_tmr_irq = max_t(uint16_t, buf_tmr_irq, 1); | |||||
flags = HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS_INPUT_FLAGS_TIMER_RESET; | |||||
/* RING_IDLE generates more IRQs for lower latency. Enable it only | |||||
* if coal_usecs is less than 25 us. | |||||
*/ | |||||
if (softc->rx_coal_usecs < 25) | |||||
flags |= HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS_INPUT_FLAGS_RING_IDLE; | |||||
bnxt_hwrm_set_coal_params(softc, max_buf_irq << 16 | max_buf, | |||||
buf_tmr_irq << 16 | buf_tmr, flags, &req_rx); | |||||
/* max_buf must not be zero */ | |||||
max_buf = clamp_t(uint16_t, softc->tx_coal_frames, 1, 63); | |||||
max_buf_irq = clamp_t(uint16_t, softc->tx_coal_frames_irq, 1, 63); | |||||
buf_tmr = BNXT_USEC_TO_COAL_TIMER(softc->tx_coal_usecs); | |||||
/* buf timer set to 1/4 of interrupt timer */ | |||||
buf_tmr = max_t(uint16_t, buf_tmr / 4, 1); | |||||
buf_tmr_irq = BNXT_USEC_TO_COAL_TIMER(softc->tx_coal_usecs_irq); | |||||
buf_tmr_irq = max_t(uint16_t, buf_tmr_irq, 1); | |||||
flags = HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS_INPUT_FLAGS_TIMER_RESET; | |||||
bnxt_hwrm_set_coal_params(softc, max_buf_irq << 16 | max_buf, | |||||
buf_tmr_irq << 16 | buf_tmr, flags, &req_tx); | |||||
for (i = 0; i < softc->nrxqsets; i++) { | |||||
req = &req_rx; | |||||
/* | |||||
* TBD: | |||||
* Check if Tx also needs to be done | |||||
* So far, Tx processing has been done in softirq contest | |||||
* | |||||
* req = &req_tx; | |||||
*/ | |||||
req->ring_id = htole16(softc->grp_info[i].cp_ring_id); | |||||
rc = hwrm_send_message(softc, req, sizeof(*req)); | |||||
if (rc) | |||||
break; | |||||
} | |||||
return rc; | |||||
} | |||||
int bnxt_hwrm_func_rgtr_async_events(struct bnxt_softc *softc, unsigned long *bmap, | |||||
int bmap_size) | |||||
{ | |||||
struct hwrm_func_drv_rgtr_input req = {0}; | |||||
bitstr_t *async_events_bmap; | |||||
uint32_t *events; | |||||
int i; | |||||
async_events_bmap = bit_alloc(256, M_DEVBUF, M_WAITOK|M_ZERO); | |||||
events = (uint32_t *)async_events_bmap; | |||||
bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_FUNC_DRV_RGTR); | |||||
req.enables = | |||||
htole32(HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_ASYNC_EVENT_FWD); | |||||
memset(async_events_bmap, 0, sizeof(256 / 8)); | |||||
bit_set(async_events_bmap, HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE); | |||||
bit_set(async_events_bmap, HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_UNLOAD); | |||||
bit_set(async_events_bmap, HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_CONN_NOT_ALLOWED); | |||||
bit_set(async_events_bmap, HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_CFG_CHANGE); | |||||
bit_set(async_events_bmap, HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_CHANGE); | |||||
if (bmap && bmap_size) { | |||||
for (i = 0; i < bmap_size; i++) { | |||||
if (bit_test(bmap, i)) | |||||
bit_set(async_events_bmap, i); | |||||
} | |||||
} | |||||
for (i = 0; i < 8; i++) | |||||
req.async_event_fwd[i] |= htole32(events[i]); | |||||
free(async_events_bmap, M_DEVBUF); | |||||
return hwrm_send_message(softc, &req, sizeof(req)); | |||||
} | |||||