Differential D11560 Diff 30657 sys/dev/mlx4/mlx4_en/en.h

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sys/dev/mlx4/mlx4_en/en.h

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#define MLX4_EN_ALLOC_SIZE PAGE_ALIGN(PAGE_SIZE)		#define MLX4_EN_ALLOC_SIZE PAGE_ALIGN(PAGE_SIZE)
#define MLX4_EN_ALLOC_ORDER get_order(MLX4_EN_ALLOC_SIZE)		#define MLX4_EN_ALLOC_ORDER get_order(MLX4_EN_ALLOC_SIZE)

enum mlx4_en_alloc_type {		enum mlx4_en_alloc_type {
MLX4_EN_ALLOC_NEW = 0,		MLX4_EN_ALLOC_NEW = 0,
MLX4_EN_ALLOC_REPLACEMENT = 1,		MLX4_EN_ALLOC_REPLACEMENT = 1,
};		};

		/* Receive fragment sizes; we use at most 3 fragments (for 9600 byte MTU
		* and 4K allocations) */
		#if MJUMPAGESIZE == 4096
		enum {
		FRAG_SZ0 = MCLBYTES,
		FRAG_SZ1 = MJUMPAGESIZE,
		FRAG_SZ2 = MJUMPAGESIZE,
		};
		#define MLX4_EN_MAX_RX_FRAGS 3
		#elif MJUMPAGESIZE == 8192
		enum {
		FRAG_SZ0 = MCLBYTES,
		FRAG_SZ1 = MJUMPAGESIZE,
		};
		#define MLX4_EN_MAX_RX_FRAGS 2
		#else
		#error "Unknown PAGE_SIZE"
		#endif

/* Maximum ring sizes */		/* Maximum ring sizes */
#define MLX4_EN_DEF_TX_QUEUE_SIZE 4096		#define MLX4_EN_DEF_TX_QUEUE_SIZE 4096

/* Minimum packet number till arming the CQ */		/* Minimum packet number till arming the CQ */
#define MLX4_EN_MIN_RX_ARM 2048		#define MLX4_EN_MIN_RX_ARM 2048
#define MLX4_EN_MIN_TX_ARM 2048		#define MLX4_EN_MIN_TX_ARM 2048

/* Maximum ring sizes */		/* Maximum ring sizes */
▲ Show 20 Lines • Show All 183 Lines • ▼ Show 20 Lines	struct mlx4_en_rx_spare {
u64 paddr_be;		u64 paddr_be;
};		};

struct mlx4_en_rx_ring {		struct mlx4_en_rx_ring {
struct mlx4_hwq_resources wqres;		struct mlx4_hwq_resources wqres;
bus_dma_tag_t dma_tag;		bus_dma_tag_t dma_tag;
struct mlx4_en_rx_spare spare;		struct mlx4_en_rx_spare spare;
u32 size ; /* number of Rx descs*/		u32 size ; /* number of Rx descs*/
		u32 num_mbufs;
u32 actual_size;		u32 actual_size;
u32 size_mask;		u32 size_mask;
u16 stride;		u16 stride;
u16 log_stride;		u16 log_stride;
u16 cqn; /* index of port CQ associated with this ring */		u16 cqn; /* index of port CQ associated with this ring */
u32 prod;		u32 prod;
u32 cons;		u32 cons;
u32 buf_size;		u32 buf_size;
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struct en_port {		struct en_port {
struct kobject kobj;		struct kobject kobj;
struct mlx4_dev *dev;		struct mlx4_dev *dev;
u8 port_num;		u8 port_num;
u8 vport_num;		u8 vport_num;
};		};

		struct mlx4_en_frag_info {
		u16 frag_size;
		};

struct mlx4_en_priv {		struct mlx4_en_priv {
struct mlx4_en_dev *mdev;		struct mlx4_en_dev *mdev;
struct mlx4_en_port_profile *prof;		struct mlx4_en_port_profile *prof;
struct net_device *dev;		struct net_device *dev;
unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];		unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
struct mlx4_en_port_state port_state;		struct mlx4_en_port_state port_state;
spinlock_t stats_lock;		spinlock_t stats_lock;
/* To allow rules removal while port is going down */		/* To allow rules removal while port is going down */
Show All 34 Lines	struct mlx4_en_priv {
int cqe_factor;		int cqe_factor;

struct mlx4_en_rss_map rss_map;		struct mlx4_en_rss_map rss_map;
u32 flags;		u32 flags;
u8 num_tx_rings_p_up;		u8 num_tx_rings_p_up;
u32 tx_ring_num;		u32 tx_ring_num;
u32 rx_ring_num;		u32 rx_ring_num;
u32 rx_mb_size;		u32 rx_mb_size;
		struct mlx4_en_frag_info frag_info[MLX4_EN_MAX_RX_FRAGS];
		u16 num_frags;
		u16 log_mbuf;

struct mlx4_en_tx_ring **tx_ring;		struct mlx4_en_tx_ring **tx_ring;
struct mlx4_en_rx_ring *rx_ring[MAX_RX_RINGS];		struct mlx4_en_rx_ring *rx_ring[MAX_RX_RINGS];
struct mlx4_en_cq **tx_cq;		struct mlx4_en_cq **tx_cq;
struct mlx4_en_cq *rx_cq[MAX_RX_RINGS];		struct mlx4_en_cq *rx_cq[MAX_RX_RINGS];
struct mlx4_qp drop_qp;		struct mlx4_qp drop_qp;
struct work_struct rx_mode_task;		struct work_struct rx_mode_task;
struct work_struct watchdog_task;		struct work_struct watchdog_task;
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