Differential D10899 Diff 29726 head/sys/arm/mv/mv_common.c

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head/sys/arm/mv/mv_common.c

Show First 20 Lines • Show All 413 Lines • ▼ Show 20 Lines	soc_id(uint32_t dev, uint32_t rev)
*/		*/
*dev = bus_space_read_4(fdtbus_bs_tag, MV_PCIE_BASE, 0) >> 16;		*dev = bus_space_read_4(fdtbus_bs_tag, MV_PCIE_BASE, 0) >> 16;
*rev = bus_space_read_4(fdtbus_bs_tag, MV_PCIE_BASE, 8) & 0xff;		*rev = bus_space_read_4(fdtbus_bs_tag, MV_PCIE_BASE, 8) & 0xff;
}		}

static void		static void
soc_identify(void)		soc_identify(void)
{		{
uint32_t d, r, size, mode;		uint32_t d, r, size, mode, freq;
const char *dev;		const char *dev;
const char *rev;		const char *rev;

soc_id(&d, &r);		soc_id(&d, &r);

printf("SOC: ");		printf("SOC: ");
if (bootverbose)		if (bootverbose)
printf("(0x%4x:0x%02x) ", d, r);		printf("(0x%4x:0x%02x) ", d, r);
▲ Show 20 Lines • Show All 76 Lines • ▼ Show 20 Lines	soc_identify(void)
default:		default:
dev = "UNKNOWN";		dev = "UNKNOWN";
break;		break;
}		}

printf("%s", dev);		printf("%s", dev);
if (*rev != '\0')		if (*rev != '\0')
printf(" rev %s", rev);		printf(" rev %s", rev);
printf(", TClock %dMHz\n", get_tclk() / 1000 / 1000);		printf(", TClock %dMHz", get_tclk() / 1000 / 1000);
		freq = get_cpu_freq();
		if (freq != 0)
		printf(", Frequency %dMHz", freq / 1000 / 1000);
		printf("\n");

mode = read_cpu_ctrl(CPU_CONFIG);		mode = read_cpu_ctrl(CPU_CONFIG);
printf(" Instruction cache prefetch %s, data cache prefetch %s\n",		printf(" Instruction cache prefetch %s, data cache prefetch %s\n",
(mode & CPU_CONFIG_IC_PREF) ? "enabled" : "disabled",		(mode & CPU_CONFIG_IC_PREF) ? "enabled" : "disabled",
(mode & CPU_CONFIG_DC_PREF) ? "enabled" : "disabled");		(mode & CPU_CONFIG_DC_PREF) ? "enabled" : "disabled");

switch (d) {		switch (d) {
case MV_DEV_88F6281:		case MV_DEV_88F6281:
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