Differential D10899 Diff 28788 sys/arm/mv/armada38x/armada38x.c

Changeset View

Standalone View

sys/arm/mv/armada38x/armada38x.c

	Show All 23 Lines
	* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF			* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
	* SUCH DAMAGE.			* SUCH DAMAGE.
	*/			*/

	#include <sys/cdefs.h>			#include <sys/cdefs.h>
	__FBSDID("$FreeBSD$");			__FBSDID("$FreeBSD$");

	#include <sys/param.h>			#include <sys/param.h>
				#include <sys/sysctl.h>
	#include <sys/systm.h>			#include <sys/systm.h>
	#include <sys/bus.h>			#include <sys/bus.h>

	#include <machine/fdt.h>			#include <machine/fdt.h>

	#include <arm/mv/mvwin.h>			#include <arm/mv/mvwin.h>
	#include <arm/mv/mvreg.h>			#include <arm/mv/mvreg.h>
	#include <arm/mv/mvvar.h>			#include <arm/mv/mvvar.h>

	int armada38x_open_bootrom_win(void);			int armada38x_open_bootrom_win(void);
	int armada38x_scu_enable(void);			int armada38x_scu_enable(void);
	int armada38x_win_set_iosync_barrier(void);			int armada38x_win_set_iosync_barrier(void);
	int armada38x_mbus_optimization(void);			int armada38x_mbus_optimization(void);

				static int hw_clockrate;
				SYSCTL_INT(_hw, OID_AUTO, clockrate, CTLFLAG_RD,
				&hw_clockrate, 0, "CPU instruction clock rate");

	uint32_t			uint32_t
	get_tclk(void)			get_tclk(void)
	{			{
	uint32_t sar;			uint32_t sar;

	/*			/*
	* On Armada38x TCLK can be configured to 250 MHz or 200 MHz.			* On Armada38x TCLK can be configured to 250 MHz or 200 MHz.
	* Current setting is read from Sample At Reset register.			* Current setting is read from Sample At Reset register.
	*/			*/
	sar = (uint32_t)get_sar_value();			sar = (uint32_t)get_sar_value();
	sar = (sar & TCLK_MASK) >> TCLK_SHIFT;			sar = (sar & TCLK_MASK) >> TCLK_SHIFT;
	if (sar == 0)			if (sar == 0)
	return (TCLK_250MHZ);			return (TCLK_250MHZ);
	else			else
	return (TCLK_200MHZ);			return (TCLK_200MHZ);
				}

				uint32_t
				get_cpu_freq(void)
				{
				uint32_t sar;

				static const uint32_t cpu_frequencies[] = {
				0, 0, 0, 0,
				1066, 0, 0, 0,
				1332, 0, 0, 0,
				1600, 0, 0, 0,
				1866, 0, 0, 2000
				};

				sar = (uint32_t)get_sar_value();
				sar = (sar & CPU_DDR_CLK_MASK) >> CPU_DDR_CLK_SHIFT;
				if (sar >= nitems(cpu_frequencies))
				return (0);

				hw_clockrate = cpu_frequencies[sar];

				return (hw_clockrate * 1000 * 1000);
	}			}

	int			int
	armada38x_win_set_iosync_barrier(void)			armada38x_win_set_iosync_barrier(void)
	{			{
	bus_space_handle_t vaddr_iowind;			bus_space_handle_t vaddr_iowind;
	int rv;			int rv;

	▲ Show 20 Lines • Show All 118 Lines • Show Last 20 Lines