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head/sys/arm/mv/mv_common.c
| Show First 20 Lines • Show All 2,263 Lines • ▼ Show 20 Lines | if ((err = fdt_get_ranges("/localbus", ranges, sizeof(ranges), | ||||
| /* | /* | ||||
| * Fill CPU decode windows table. | * Fill CPU decode windows table. | ||||
| */ | */ | ||||
| bzero((void *)&cpu_win_tbl, sizeof(cpu_win_tbl)); | bzero((void *)&cpu_win_tbl, sizeof(cpu_win_tbl)); | ||||
| entry_size = tuple_size / sizeof(pcell_t); | entry_size = tuple_size / sizeof(pcell_t); | ||||
| cpu_wins_no = tuples; | cpu_wins_no = tuples; | ||||
| /* Check range */ | |||||
| if (tuples > nitems(cpu_win_tbl)) { | |||||
| debugf("too many tuples to fit into cpu_win_tbl\n"); | |||||
| return (ENOMEM); | |||||
| } | |||||
| for (i = 0, t = 0; t < tuples; i += entry_size, t++) { | for (i = 0, t = 0; t < tuples; i += entry_size, t++) { | ||||
| cpu_win_tbl[t].target = 1; | cpu_win_tbl[t].target = 1; | ||||
| cpu_win_tbl[t].attr = fdt32_to_cpu(ranges[i + 1]); | cpu_win_tbl[t].attr = fdt32_to_cpu(ranges[i + 1]); | ||||
| cpu_win_tbl[t].base = fdt32_to_cpu(ranges[i + 2]); | cpu_win_tbl[t].base = fdt32_to_cpu(ranges[i + 2]); | ||||
| cpu_win_tbl[t].size = fdt32_to_cpu(ranges[i + 3]); | cpu_win_tbl[t].size = fdt32_to_cpu(ranges[i + 3]); | ||||
| cpu_win_tbl[t].remap = ~0; | cpu_win_tbl[t].remap = ~0; | ||||
| debugf("target = 0x%0x attr = 0x%0x base = 0x%0x " | debugf("target = 0x%0x attr = 0x%0x base = 0x%0x " | ||||
| "size = 0x%0x remap = 0x%0x\n", | "size = 0x%0x remap = 0x%0x\n", | ||||
| Show All 15 Lines | win_cpu_from_dt(void) | ||||
| if ((node = fdt_find_compatible(node, "mrvl,cesa-sram", 0)) == 0) | if ((node = fdt_find_compatible(node, "mrvl,cesa-sram", 0)) == 0) | ||||
| /* SRAM block is not always present. */ | /* SRAM block is not always present. */ | ||||
| return (0); | return (0); | ||||
| moveon: | moveon: | ||||
| sram_base = sram_size = 0; | sram_base = sram_size = 0; | ||||
| if (fdt_regsize(node, &sram_base, &sram_size) != 0) | if (fdt_regsize(node, &sram_base, &sram_size) != 0) | ||||
| return (EINVAL); | return (EINVAL); | ||||
| /* Check range */ | |||||
| if (t >= nitems(cpu_win_tbl)) { | |||||
| debugf("cannot fit CESA tuple into cpu_win_tbl\n"); | |||||
| return (ENOMEM); | |||||
| } | |||||
| cpu_win_tbl[t].target = MV_WIN_CESA_TARGET; | cpu_win_tbl[t].target = MV_WIN_CESA_TARGET; | ||||
| #ifdef SOC_MV_ARMADA38X | #ifdef SOC_MV_ARMADA38X | ||||
| cpu_win_tbl[t].attr = MV_WIN_CESA_ATTR(0); | cpu_win_tbl[t].attr = MV_WIN_CESA_ATTR(0); | ||||
| #else | #else | ||||
| cpu_win_tbl[t].attr = MV_WIN_CESA_ATTR(1); | cpu_win_tbl[t].attr = MV_WIN_CESA_ATTR(1); | ||||
| #endif | #endif | ||||
| cpu_win_tbl[t].base = sram_base; | cpu_win_tbl[t].base = sram_base; | ||||
| ▲ Show 20 Lines • Show All 255 Lines • Show Last 20 Lines | |||||